JAJST20A March 2024 – September 2024 DLPC964
PRODUCTION DATA
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
The DLPC964 digital controller supports the ability to select one of the following block update modes as well as which of the 16 block addresses to update utilizing the BLKMODE_[1:0] inputs.
The block modes allowed are:
These mode input pins must be configured at power up. If the mode is desired to be changed after power up, MCPs must be discontinued, the pins configured to their new values, and the proper I2C command sent to reconfigure the DMD. See Table 6-7 for detailed information on which blocks are capable of being updated in each mode.
BLKMODE_1 | BLKMODE_0 | BLKADDR_3 | BLKADDR_2 | BLKADDR_1 | BLKADDR_0 | OPERATION |
---|---|---|---|---|---|---|
0 | 0 | 0 | 0 | 0 | 0 | Update Block 0 |
0 | 0 | 0 | 0 | 0 | 1 | Update Block 1 |
0 | 0 | 0 | 0 | 1 | 0 | Update Block 2 |
0 | 0 | 0 | 0 | 1 | 1 | Update Block 3 |
0 | 0 | 0 | 1 | 0 | 0 | Update Block 4 |
0 | 0 | 0 | 1 | 0 | 1 | Update Block 5 |
0 | 0 | 0 | 1 | 1 | 0 | Update Block 6 |
0 | 0 | 0 | 1 | 1 | 1 | Update Block 7 |
0 | 0 | 1 | 0 | 0 | 0 | Update Block 8 |
0 | 0 | 1 | 0 | 0 | 1 | Update Block 9 |
0 | 0 | 1 | 0 | 1 | 0 | Update Block 10 |
0 | 0 | 1 | 0 | 1 | 1 | Update Block 11 |
0 | 0 | 1 | 1 | 0 | 0 | Update Block 12 |
0 | 0 | 1 | 1 | 0 | 1 | Update Block 13 |
0 | 0 | 1 | 1 | 1 | 0 | Update Block 14 |
0 | 0 | 1 | 1 | 1 | 1 | Update Block 15 |
0 | 1 | 0 | 0 | 0 | x | Update Blocks 0-1 |
0 | 1 | 0 | 0 | 1 | x | Update Blocks 2-3 |
0 | 1 | 0 | 1 | 0 | x | Update Blocks 4-5 |
0 | 1 | 0 | 1 | 1 | x | Update Blocks 6-7 |
0 | 1 | 1 | 0 | 0 | x | Update Blocks 8-9 |
0 | 1 | 1 | 0 | 1 | x | Update Blocks 10-11 |
0 | 1 | 1 | 1 | 0 | x | Update Blocks 12-13 |
0 | 1 | 1 | 1 | 1 | x | Update Blocks 14-15 |
1 | 0 | 0 | 0 | x | x | Update Blocks 0-3 |
1 | 0 | 0 | 1 | x | x | Update Blocks 4-7 |
1 | 0 | 1 | 0 | x | x | Update Blocks 8-11 |
1 | 0 | 1 | 1 | x | x | Update Blocks 12-15 |
1 | 1 | x | x | x | x | Global Mode |