JAJST20A March 2024 – September 2024 DLPC964
PRODUCTION DATA
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
Field Position | Field Type | Field Description |
---|---|---|
gt0_s_axi_user_k_tx_tdata[7:0] | USERK_BLOCK_NUMBER | Must set to all zeroes (0x00). Values other than 0x00 are invalid, DLPC964 controller will ignore the entire 192 bit control word if the field is not zeroes. |
gt0_s_axi_user_k_tx_tdata[11:8] | BLOCK_ADDRESS | Indicates the address of the DMD block to which the DLPC964 will apply the operation. 0000: DMD Block 0, 0001: DMD Block 1, 0010: DMD Block 2, ... 1110: DMD Block 14, 1111: DMD Block 15 |
gt0_s_axi_user_k_tx_tdata[15:12] | Reserved, unused | |
gt0_s_axi_user_k_tx_tdata[24:16] | ROW_LENGTH | Number of rows the DLPC964 will load the user data into. DLP991U has 136 rows per block, thus valid range is 1-136. All other values, including 0 are invalid. Set to 136 for full block operation, or 1-135 for partial block. |
Note: This field only used if LOAD_TYPE is 000. | ||
gt0_s_axi_user_k_tx_tdata[34:32] | LOAD_TYPE | 000: Block loading. DLPC964 will load the user data to the DMD array area defined by the BLOCK_ADDRESS and ROW_LENGTH |
001: Block Clear. DLPC964 will clear the DMD array to zeroes in the entire block defined by BLOCK_ADDRESS. | ||
010: Block Set. DLPC964 will set the DMD array to ones in the entire block defined by BLOCK_ADDRESS | ||
Other values: reserved, do not use. | ||
Note: when in 001 (block clear) or 010 (block set) operation, the ROW_LENGTH and NORTH_SOUTH_FLIP fields are ignored. Block Set/Clear operations do not support partial block operation. | ||
gt0_s_axi_user_k_tx_tdata[36] | NORTH_SOUTH_FLIP | Control the direction of data loading within a DMD block. |
0: DLPC964 loads data starting and counting up from row 0 | ||
1: DLPC964 loads data starting and counting down from row 135 | ||
Note: this field only used if LOAD_TYPE is 000 | ||
gt0_s_axi_user_k_tx_tdata[29:28] | DMD_SEGMENT | When SINGLE_CHANNEL_MODE = '1', select the DMD segment to which the DLPC964 will apply the operation. |
DLPC964 controller ignores this field if SINGLE_CHANNEL_MODE = '0' | ||
gt0_s_axi_user_k_tx_tdata[30] | SINGLE_CHANNEL_MODE | 1: Single channel operation. Loading the DMD array with only Aurora 64B/66B channel 0. |
0: Normal operation. Loading the DMD array with all four Aurora 64B/66B channels. | ||
gt0_s_axi_user_k_tx_tdata[191:31] | Reserved, unused |