JAJST20A March 2024 – September 2024 DLPC964
PRODUCTION DATA
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The DLPC964 interface is made up of several buses and controls signals as shown in the following list. The Aurora 64B/66B high speed serial (HSS) input buses provide the means of loading data to the DLPC964. The high speed serial interface (HSSI) output buses provide the data to the DMD. Each input and output bus has an associated clock which clocks the data into the DLPC964 or into the DMD. Block control signals define the type of mirror clock pulse to use after all the data is loaded into the DMD.
Control output signals