SPRS989 Data sheet

SPRS989F December 2016 – December 2018 DRA74P , DRA75P

PRODUCTION DATA.

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）

ABZ|760

サーマルパッド・メカニカル・データ

発注情報

sprs989f_oa

5.10.4.1.3.1 OSC1 External Crystal

An external crystal is connected to the device pins. Figure 5-17 describes the crystal implementation.

Figure 5-17 Crystal Implementation

NOTE

The load capacitors, C_f1 and C_f2 in Figure 5-17, should be chosen such that the below equation is satisfied. C_L in the equation is the load specified by the crystal manufacturer. All discrete components used to implement the oscillator circuit should be placed as close as possible to the associated oscillator xi_osc1, xo_osc1, and vssa_osc1 pins.

Figure 5-18 Load Capacitance Equation

The crystal must be in the fundamental mode of operation and parallel resonant. Table 5-22 summarizes the required electrical constraints.

Table 5-22 OSC1 Crystal Electrical Characteristics

NAME	DESCRIPTION			MIN	TYP	MAX	UNIT
f_p	Parallel resonance crystal frequency			Range from 19.2 to 32			MHz
C_f1	C_f1 load capacitance for crystal parallel resonance with C_f1 = C_f2			12		24	pF
C_f2	C_f2 load capacitance for crystal parallel resonance with C_f1 = C_f2			12		24	pF
ESR(C_f1,C_f2)	Crystal ESR					100	Ω
C_O	Crystal shunt capacitance	ESR = 30 Ω	19.2 MHz≤f_p≤32 MHz			7	pF
		ESR = 40 Ω	19.2 MHz≤f_p≤32 MHz			5	pF
		ESR = 50 Ω	19.2 MHz≤f_p≤25 MHz			7	pF
			25 MHz<f_p≤27 MHz			5	pF
			27 MHz<f_p≤32 MHz	Not Supported			-
		ESR = 60 Ω	19.2 MHz≤f_p≤23 MHz			7	pF
			23 MHz<f_p≤25 MHz			5	pF
			25 MHz<f_p≤32 MHz	Not Supported			-
		ESR = 80 Ω	19.2 MHz≤f_p≤23 MHz			5	pF
			23 MHz≤f_p≤25 MHz			3	pF
			25 MHz<f_p≤32 MHz	Not Supported			-
		ESR = 100 Ω	19.2 MHz≤f_p≤20 MHz			3	pF
		ESR = 100 Ω	20 MHz<f_p≤32 MHz	Not Supported			-
L_M	Crystal motional inductance for f_p = 20 MHz				10.16		mH
C_M	Crystal motional capacitance				3.42		fF
t_j(xiosc1)	Frequency accuracy^⁽¹⁾, xi_osc1		Ethernet and MLB not used			±200	ppm
			Ethernet RGMII and RMII using derived clock			±50
			Ethernet MII using derived clock			±100
			MLB using derived clock			±50

Crystal characteristics should account for tolerance+stability+aging.

When selecting a crystal, the system design must take into account the temperature and aging characteristics of a crystal versus the user environment and expected lifetime of the system.

Table 5-23 details the switching characteristics of the oscillator and the requirements of the input clock.

Table 5-23 Oscillator Switching Characteristics—Crystal Mode

NAME	DESCRIPTION	MIN	TYP	MAX	UNIT
f_p	Oscillation frequency	Range from 19.2 to 32			MHz
t_sX	Start-up time			4	ms