JAJSPO7C March   2015  – January 2023 DRV2700

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Boost Converter and Control Loop
      2. 7.3.2 High-Voltage Amplifier
      3. 7.3.3 Fast Start-Up (Enable Pin)
      4. 7.3.4 Gain Control
      5. 7.3.5 Adjustable Boost Voltage
      6. 7.3.6 Adjustable Boost Current-Limit
      7. 7.3.7 Internal Charge Pump
      8. 7.3.8 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Boost + Amplifier Mode
      2. 7.4.2 Flyback Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 AC-Coupled DAC Input Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Piezo Load Selection
          2. 8.2.1.2.2  Programming The Boost Voltage
          3. 8.2.1.2.3  Inductor and Transformer Selection
          4. 8.2.1.2.4  Programing the Boost and Flyback Current-Limit
          5. 8.2.1.2.5  Boost Capacitor Selection
          6. 8.2.1.2.6  Pulldown FET and Resistors
          7. 8.2.1.2.7  Low-Voltage Operation
          8. 8.2.1.2.8  Current Consumption Calculation
          9. 8.2.1.2.9  Input Filter Considerations
          10. 8.2.1.2.10 Output Limiting Factors
          11. 8.2.1.2.11 Startup and Shutdown Sequencing
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Filtered AC Coupled Single-Ended PWM Input Application
      3. 8.2.3 DC-Coupled DAC Input Application
      4. 8.2.4 DC-Coupled Reference Input Application
      5. 8.2.5 Flyback Circuit
    3. 8.3 System Example
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Boost + Amplifier Configuration Layout Considerations
      2. 10.1.2 Flyback Configuration Layout Considerations
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Trademarks
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • RGP|20
サーマルパッド・メカニカル・データ
発注情報

7.3.4 Gain Control

The DRV2700 device has programmable gains through the GAIN[1:0] bits. Table 8-1 lists the gain from IN+ or IN– to OUT+ or OUT–.

Table 7-1 Programmable Gains
GAIN1GAIN0GAIN (dB)
0028.8
0134.8
1038.4
1140.7

The gains are optimized to achieve approximately 50 VPP, 100 VPP, 150 VPP, or 200 VPP at the output without clipping from a 1.8-V peak source of a single-ended input signal.