JAJSPK9 January   2023 DRV2901

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Block Diagrams
    2. 7.2 Feature Description
      1. 7.2.1 Error Reporting
      2. 7.2.2 Device Reset
      3. 7.2.3 Device Protection System
        1. 7.2.3.1 Overcurrent (OC) Protection With Current Limiting and Overload Detection
        2. 7.2.3.2 Overtemperature Protection
        3. 7.2.3.3 Undervoltage Protection (UVP) and Power-On Reset (POR)
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
  9. 9 Power Supply Recommendations
    1. 9.1 System Power-up/power-down Sequence
      1. 9.1.1 Powering Up
      2. 9.1.2 Powering Down
    2. 9.2 System Design Recommendations
      1. 9.2.1 VDD Pin
      2. 9.2.2 VREG Pin
      3. 9.2.3 OTW Pin
  10. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.2.3.3 Undervoltage Protection (UVP) and Power-On
Reset (POR)

The UVP and POR circuits of the DRV2901 fully protect the device in any power-up/down and brownout situation. While powering up, the POR circuit resets the overload circuit (OLP) and ensures that all circuits are fully operational when the GVDD_X and VDD supply voltages reach 9.8 V (typical). Although GVDD_X and VDD are independently monitored, a supply voltage drop below the UVP threshold on any VDD or GVDD_X pin results in all half-bridge outputs immediately being set in the high-impedance (Hi-Z) state and SD being asserted low. The device automatically resumes operation when all supply voltage on the bootstrap capacitors have increased above the UVP threshold.