JAJSN01 May 2024 DRV7308
ADVANCE INFORMATION
MIN | NOM | MAX | UNIT | |||
---|---|---|---|---|---|---|
VVM | DC power supply voltage | VM | 0 | 450 | V | |
VGVDD | Gate driver supply voltage (PDRV7308) (1) | GVDD | 10.8 | 15 | V | |
fPWM | PWM frequency | OUTA, OUTB, OUTC | 20 | 60 | kHz | |
VIN | Logic Input Voltage | INHx, INLx, EN, BRAKE | -0.1 | 5 | V | |
VOD | Open drain pull up voltage | HV_nFAULT | -0.1 | 5 | V | |
IOD | Open drain output sink current | HV_nFAULT | 0 | 5 | mA | |
VSR | Slew rate pin voltage | SR | GVDD | V | ||
VSLx | SLx pin voltage | SLA, SLB, SLC | -1 | 1 | V | |
VAMPINx | Amplifier input pin voltage | AMPIN+, AMPIN- | -0.1 | 5 | V | |
VILIMIT | Over current protection reference | ILIMIT | 0.1 | 2 | V | |
TON_MIN | Minimum low side on time @ Fsw = 20kHz/16kHz | 0.5 | µs | |||
TA | –40 | 100 | °C | |||
TJ | –40 | 125 | °C |