The electro-chromic driver block has multiple protection and detection circuits for both charge and discharge states. There are the comparator-based detection circuits, protection circuits of OUT11 which are active during EC charge state (when configured with OUT11 as supply), and protection circuits on ECFB low-side discharge MOSFET.

EC supplied by OUT11: When the electrochrome drive is configured to be supplied by integrated high-side driver OUT11, the same protection and diagnostic functions as the other high-side drivers are available (e.g. during an overcurrent detection, the control loop is switched off). These high-side driver protections are active when the electrochrome is in the charge state (voltage ramp up). When in OUT11 EC mode ( OUT11_EC_MODE = 1b), OUT11 cannot be controlled in PWM mode.

Fault on OUT11 during EC charge: In case of an overtemperature shutdown fault (zone 3 or 4) or overcurrent fault on OUT11 while EC_ON = 1b (EC control enabled):

• OUT11 is shut off (status register set)
• DAC is reset (EC_V_TAR set to '00000')
• ECDRV pin is pulled to ground
• EC_ON remains '1'
• ECFB_LS_EN remains as programmed

To restart EC control after OUT11 failure, the controller must read and clear the corresponding fault, and write the desired value to bits EC_V_TAR in register HS_EC_HEAT_CTRL.

If an open load is detected on OUT11 during EC charge, the OUT11_OLA bit in register HS_STAT is set.

Discharge Over current protection: If the load current into the ECFB pin LS MOSFET during discharge exceeds the over current threshold I_{OC_ECFB} for longer than t_{DG_OC_ECFB}, then the LS MOSFET is either Hi-Z (latch) or enters fixed-frequency regulation mode based on OUT7 ITRIP settings. The over current status bit ECFB_OC is set, and EC_HEAT is set. Overcurrent fault response is configurable with EC_FLT_MODE bit in register EC_CNFG. The ITRIP settings are shared with OUT7 ITRIP settings.

Discharge Open load detection: While discharging the EC, open-load can also be detected. Bit EC_OLEN in register EC_CNFG must be set. If the load current on ECFB is below I_{OL_ECFB_LS} for longer than t_{DG_OL_ECFB_LS}, then the open load status bit ECFB_OL is set, and WARN bit is set in register IC_STAT1.

For EC direct PVDD supply configuration, there are three comparator-based detection circuits that can be used when EC regulation is active in place of relying on the OUT11 protection and detection circuits. These include:

• Short to Battery detection on ECFB (overvoltage)
• Short to Ground detection on ECFB (undervoltage)
• Open-load detection on ECFB

EC supply direct to PVDD: When the EC block is supplied directly to PVDD, short to battery, short to ground, and open load detection circuits can be independently enabled with bits ECFB_OV_MODE, ECFB_UV_MODE, and ECDRV_OL_EN in register EC_CNFG. These detection circuits can be enabled regardless of EC supply configuration if extra diagnostics are desired. However, if they are not desired then it is recommended to disable them in register.

Figure 7-10 Electrochrome with direct PVDD supply (OUT11 independent)

Short to Battery/OV detection: ECFB overvoltage or short to battery is detected when ECFB voltage exceeds PVDD - 1V, or threshold V_{ECFB_OV}, for longer than the deglitch time t_{ECFB_OV_DG}. BitECFB_OV_MODE determines the driver ECFB overvoltage fault response. The EC overvoltage deglitch time is configured with bit ECFB_OV_DG in register EC_CNFG.

For over voltage fault response control, bit ECFB_OV_MODE can be configured in register EC_CNFG. If ECFB_OV_MODE = 00b, then no action is taken during this fault. For ECFB_OV_MODE = 10b, when ECFB voltage exceeds ECFB_OV for longer than programmed deglitch time t_{ECFB_OV_DG}, then the ECFB_OV bit is set in EC_HEAT_ITRIP_STAT register, and EC_HEAT fault bit is set in register IC_STAT1. For ECFB_OV_MODE = 10b, when OV on ECFB occurs, the ECDRV pin is pulled down, and the ECFB LS FET is Hi-Z. Faults are reported in the same registers as for when ECFB_OV_MODE = 01b. The fault responses and bit values are summarized in the table below:

Short to Ground/UV detection: ECFB under voltage or short to ground is detected when ECFB voltage is detected below the programmed threshold V_{ECFB_UV_TH} for longer than the programmed deglitch time t_{ECFB_UV_DG}. Bits ECFB_UV_TH and ECFB_UV_DG are set in register EC_CNFG.

For under voltage fault response control, bit ECFB_UV_MODE can be configured in registerEC_CNFG. If ECFB_UV_MODE = 00b, then no action is taken when ECFB voltage falls below ECFB_UV. For ECFB_UV_MODE = 10b, then the ECFB_UV bit is set in EC_HEAT_ITRIP_STAT register, and EC_HEAT fault bit is set in register IC_STAT1. For ECFB_UV_MODE = 10b, when UV on ECFB occurs, the ECDRV pin is pulled down, and the ECFB LS FET is Hi-Z. Faults are reported in the same registers as for whenECFB_UV_MODE = 01b. The fault responses and bit values are summarized in the table below:

PVDD supplied EC Open-load detection: If the EC block is not configured to be supplied with OUT11, a separate EC open-load detection circuit can be enabled with bit ECDRV_OL_EN in register EC_CNFG. When enabled, a current source injects a small current into the ECFB node, and the ECFB voltage is compared with the open-load threshold voltage. If the open-load threshold is exceeded, an open load condition is detected and the ECFB_OL bit will be set. The truth table below shows possible values for both open load and short to battery detection status: