JAJSU39 April   2024 DRV8235

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Timing Requirements
    7. 6.7 Timing Diagrams
    8. 6.8 Typical Operating Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 External Components
      2. 7.3.2 Summary of Features
      3. 7.3.3 Bridge Control
      4. 7.3.4 Current Sense and Regulation (IPROPI)
        1. 7.3.4.1 Current Sensing
        2. 7.3.4.2 Current Regulation
          1. 7.3.4.2.1 Fixed Off-Time Current Regulation
          2. 7.3.4.2.2 Cycle-By-Cycle Current Regulation
      5. 7.3.5 Stall Detection
      6. 7.3.6 Motor Voltage and Speed Regulation
        1. 7.3.6.1 Internal Bridge Control
        2. 7.3.6.2 Setting Speed/Voltage Regulation Parameters
          1. 7.3.6.2.1 Speed and Voltage Set
          2. 7.3.6.2.2 Speed Scaling Factor
            1. 7.3.6.2.2.1 Target Speed Setting Example
          3. 7.3.6.2.3 Motor Resistance Inverse
          4. 7.3.6.2.4 Motor Resistance Inverse Scale
          5. 7.3.6.2.5 KMC Scaling Factor
          6. 7.3.6.2.6 KMC
          7. 7.3.6.2.7 VSNS_SEL
        3. 7.3.6.3 Soft-Start and Soft-Stop
          1. 7.3.6.3.1 TINRUSH
      7. 7.3.7 Protection Circuits
        1. 7.3.7.1 Overcurrent Protection (OCP)
        2. 7.3.7.2 Thermal Shutdown (TSD)
        3. 7.3.7.3 VM Undervoltage Lockout (VM UVLO)
        4. 7.3.7.4 Overvoltage Protection (OVP)
        5. 7.3.7.5 nFAULT Output
    4. 7.4 Device Functional Modes
      1. 7.4.1 Active Mode
      2. 7.4.2 Low-Power Sleep Mode
      3. 7.4.3 Fault Mode
    5. 7.5 Programming
      1. 7.5.1 I2C Communication
        1. 7.5.1.1 I2C Write
        2. 7.5.1.2 I2C Read
  9. 8 Register Map
    1. 8.1 DRV8235_STATUS Registers
    2. 8.2 DRV8235_CONFIG Registers
    3. 8.3 DRV8235_CTRL Registers
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application: Brushed DC Motor
      1. 9.2.1 Design Requirements
      2. 9.2.2 Stall Detection
        1. 9.2.2.1 Application Description
          1. 9.2.2.1.1 Stall Detection Timing
          2. 9.2.2.1.2 Hardware Stall Threshold Selection
      3. 9.2.3 Motor Speed and Voltage Regulation Application
        1. 9.2.3.1 Tuning Parameters
          1. 9.2.3.1.1 Resistance Parameters
          2. 9.2.3.1.2 KMC and KMC_SCALE
            1. 9.2.3.1.2.1 Case I
            2. 9.2.3.1.2.2 Case II
              1. 9.2.3.1.2.2.1 Method 1: Tuning from Scratch
                1. 9.2.3.1.2.2.1.1 Tuning KMC_SCALE
                2. 9.2.3.1.2.2.1.2 Tuning KMC
              2. 9.2.3.1.2.2.2 Method 2: Using the Proportionality factor
                1. 9.2.3.1.2.2.2.1 Working Example
      4. 9.2.4 Motor Voltage
      5. 9.2.5 Motor Current
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Bulk Capacitance
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
  11. 10デバイスおよびドキュメントのサポート
    1. 10.1 ドキュメントの更新通知を受け取る方法
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 静電気放電に関する注意事項
    5. 10.5 用語集
  12. 11Revision History
  13. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.4.3 Fault Mode

The DRV8235 enters fault mode when it encounters a fault condition. This protects the device and the load on the outputs. Table 7-18 describes the device behavior in the fault mode which depends on the fault condition. The device will leave the fault mode and re-enter the active mode when the system meets the recovery condition.

Table 7-18 Fault Conditions Summary
FAULTFAULT CONDITION

CONFIGURATION

ERROR REPORT

FULL-BRIDGEINTERNAL CIRCUITSRECOVERY CONDITION

VM undervoltage (VM UVLO)

VVM < VUVLO_VM

_nFAULT / I2CDisabledDisabledVVM > VUVLO_VM
Overcurrent (OCP)IOUT > IOCP

OCP_MODE = 0b

nFAULT / I2C

DisabledOperating

Latched: CLR_FLT

OCP_MODE = 1bnFAULT / I2CDisabledOperating

Automatic retry: tRETRY

Thermal Shutdown (TSD)TJ > TTSD

TSD_MODE = 0b

nFAULT / I2C

DisabledOperatingLatched: CLR_FLT

TSD_MODE = 1b

nFAULT / I2CDisabledOperating

Automatic: TJ < TTSD - THYS

Overvoltage protection (OVP)OUTx = Hi-Z or nSLEEP = 0; VVOUT - VVM > VSD_I2C when OUTx = Hi-ZDisabledDisabledAutomatic: VVOUT - VVM < VSD