JAJST19 February   2024 DRV8262-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
      1. 5.4.1 Transient Thermal Impedance & Current Capability
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1  Overview
    2. 6.2  Functional Block Diagram
    3. 6.3  Feature Description
    4. 6.4  Device Operational Modes
      1. 6.4.1 Dual H-Bridge Mode (MODE1 = 0)
      2. 6.4.2 Single H-Bridge Mode (MODE1 = 1)
    5. 6.5  Current Sensing and Regulation
      1. 6.5.1 Current Sensing and Feedback
      2. 6.5.2 Current Regulation
        1. 6.5.2.1 Mixed Decay
        2. 6.5.2.2 Smart tune Dynamic Decay
      3. 6.5.3 Current Sensing with External Resistor
    6. 6.6  Charge Pump
    7. 6.7  Linear Voltage Regulator
    8. 6.8  VCC Voltage Supply
    9. 6.9  Logic Level, Tri-Level and Quad-Level Pin Diagrams
    10. 6.10 Protection Circuits
      1. 6.10.1 VM Undervoltage Lockout (UVLO)
      2. 6.10.2 VCP Undervoltage Lockout (CPUV)
      3. 6.10.3 Logic Supply Power on Reset (POR)
      4. 6.10.4 Overcurrent Protection (OCP)
      5. 6.10.5 Thermal Shutdown (OTSD)
      6. 6.10.6 nFAULT Output
      7. 6.10.7 Fault Condition Summary
    11. 6.11 Device Functional Modes
      1. 6.11.1 Sleep Mode
      2. 6.11.2 Operating Mode
      3. 6.11.3 nSLEEP Reset Pulse
      4. 6.11.4 Functional Modes Summary
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Driving Brushed-DC Motors
        1. 7.1.1.1 Brushed-DC Motor Driver Typical Application
        2. 7.1.1.2 Power Loss Calculations - Dual H-bridge
        3. 7.1.1.3 Power Loss Calculations - Single H-bridge
        4. 7.1.1.4 Junction Temperature Estimation
        5. 7.1.1.5 Application Performance Plots
      2. 7.1.2 Driving Stepper Motors
        1. 7.1.2.1 Stepper Driver Typical Application
        2. 7.1.2.2 Power Loss Calculations
        3. 7.1.2.3 Junction Temperature Estimation
      3. 7.1.3 Driving Thermoelectric Coolers (TEC)
  9. 8 Package Thermal Considerations
    1. 8.1 DDW Package
      1. 8.1.1 Thermal Performance
        1. 8.1.1.1 Steady-State Thermal Performance
        2. 8.1.1.2 Transient Thermal Performance
    2. 8.2 PCB Material Recommendation
  10. 9 Power Supply Recommendations
    1. 9.1 Bulk Capacitance
    2. 9.2 Power Supplies
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Tape and Reel Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

4 Pin Configuration and Functions

The DRV8262-Q1 is available in thermally-enhanced, 44-Pin HTSSOP package.
GUID-20220608-SS0I-RPKQ-7DK9-TSVF9BSXLHMC-low.svgFigure 4-1 Single H-bridge Mode, Top View
GUID-20220608-SS0I-D2WZ-0VS9-WM7FWTFR8NPF-low.svgFigure 4-2 Dual H-bridge Mode, Top View
Table 4-1 Pin Configuration
PINTYPEDESCRIPTION
NAMEDDW
Single H-BridgeDual H-Bridge
RSVDIN438InputPWM input for H-bridge 2 in dual H-bridge mode. Leave this pin unconnected in single H-bridge mode.
RSVDIN339InputPWM input for H-bridge 2 in dual H-bridge mode. Leave this pin unconnected in single H-bridge mode.
IPROPIIPROPI230OutputAnalog current output for H-bridge 2 in dual H-bridge mode. Connect to the other IPROPI pin in single H-bridge mode.
IPROPIIPROPI131OutputAnalog current output for H-bridge 1 in dual H-bridge mode. Connect to the other IPROPI pin in single H-bridge mode.
VREFVREF233InputReference input to set current for H-bridge 2 in dual H-bridge mode. Tie to the other VREF pin in single H-bridge mode. DVDD can be used to provide VREF through a resistor divider.
VREFVREF134InputReference input to set current for H-bridge 1 in dual H-bridge mode. Tie to the other VREF pin in single H-bridge mode. DVDD can be used to provide VREF through a resistor divider.
PGNDPGND123, 10PowerPower ground for H-bridge. Connect to system ground.
PGNDPGND3413, 20PowerPower ground for H-bridge. Connect to system ground.
OUT1OUT317, 18, 19OutputWinding output. Connect to motor terminal.
OUT2OUT414, 15, 16OutputWinding output. Connect to motor terminal.
OUT14, 5, 6OutputWinding output. Connect to motor terminal.
OUT27, 8, 9OutputWinding output. Connect to motor terminal.
IN240InputPWM input for H-bridge 1.
IN141InputPWM input for H-bridge 1.
DECAY37InputDecay setting pin.
TOFF35InputPWM OFF time setting pin.
OCPM27InputDetermines the fault recovery method. Depending on the OCPM voltage, fault recovery can be either latch-off or auto-retry.
VCP1PowerCharge pump output. Connect a X7R, 1μF, 16V capacitor to VM.
VM2, 11, 12, 21PowerPower supply. Connect to supply voltage and bypass to PGND with two 0.01μF ceramic capacitors plus a bulk capacitor rated for VM.
GND22, 23PowerDevice ground. Connect to system ground.
CPH44PowerCharge pump switching node. Connect a X7R, 0.022μF, VM rated ceramic capacitor from CPH to CPL.
CPL43
DVDD24PowerLDO output. Connect a X7R, 1μF, 10V ceramic capacitor to GND.
VCC25PowerSupply voltage for internal logic blocks. When no separate supply voltage is available, tie the VCC pin to the DVDD output.
nFAULT26Open DrainFault indication. Pulled logic low with fault condition; open drain output requires an external pullup resistor.
MODE128InputSelects between dual and single H-bridge modes of operation.
MODE229InputSelects the interface - between PH/EN and IN/IN.
nSLEEP42InputSleep mode input. Logic high to enable device; logic low to enter low-power sleep mode. An nSLEEP low pulse clears latched faults.
RSVD32, 36-Reserved. Leave Unconnected.
PAD--Thermal pad.