JAJST19 February   2024 DRV8262-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
      1. 5.4.1 Transient Thermal Impedance & Current Capability
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1  Overview
    2. 6.2  Functional Block Diagram
    3. 6.3  Feature Description
    4. 6.4  Device Operational Modes
      1. 6.4.1 Dual H-Bridge Mode (MODE1 = 0)
      2. 6.4.2 Single H-Bridge Mode (MODE1 = 1)
    5. 6.5  Current Sensing and Regulation
      1. 6.5.1 Current Sensing and Feedback
      2. 6.5.2 Current Regulation
        1. 6.5.2.1 Mixed Decay
        2. 6.5.2.2 Smart tune Dynamic Decay
      3. 6.5.3 Current Sensing with External Resistor
    6. 6.6  Charge Pump
    7. 6.7  Linear Voltage Regulator
    8. 6.8  VCC Voltage Supply
    9. 6.9  Logic Level, Tri-Level and Quad-Level Pin Diagrams
    10. 6.10 Protection Circuits
      1. 6.10.1 VM Undervoltage Lockout (UVLO)
      2. 6.10.2 VCP Undervoltage Lockout (CPUV)
      3. 6.10.3 Logic Supply Power on Reset (POR)
      4. 6.10.4 Overcurrent Protection (OCP)
      5. 6.10.5 Thermal Shutdown (OTSD)
      6. 6.10.6 nFAULT Output
      7. 6.10.7 Fault Condition Summary
    11. 6.11 Device Functional Modes
      1. 6.11.1 Sleep Mode
      2. 6.11.2 Operating Mode
      3. 6.11.3 nSLEEP Reset Pulse
      4. 6.11.4 Functional Modes Summary
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Driving Brushed-DC Motors
        1. 7.1.1.1 Brushed-DC Motor Driver Typical Application
        2. 7.1.1.2 Power Loss Calculations - Dual H-bridge
        3. 7.1.1.3 Power Loss Calculations - Single H-bridge
        4. 7.1.1.4 Junction Temperature Estimation
        5. 7.1.1.5 Application Performance Plots
      2. 7.1.2 Driving Stepper Motors
        1. 7.1.2.1 Stepper Driver Typical Application
        2. 7.1.2.2 Power Loss Calculations
        3. 7.1.2.3 Junction Temperature Estimation
      3. 7.1.3 Driving Thermoelectric Coolers (TEC)
  9. 8 Package Thermal Considerations
    1. 8.1 DDW Package
      1. 8.1.1 Thermal Performance
        1. 8.1.1.1 Steady-State Thermal Performance
        2. 8.1.1.2 Transient Thermal Performance
    2. 8.2 PCB Material Recommendation
  10. 9 Power Supply Recommendations
    1. 9.1 Bulk Capacitance
    2. 9.2 Power Supplies
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Tape and Reel Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.1.1.2 Power Loss Calculations - Dual H-bridge

For a H-bridge with high-side recirculation, power dissipation for each FET can be approximated as follows:

  • PHS1 = RDS(ON) × IL2

  • PLS1 = 0

  • PHS2 = [RDS(ON) × IL2 x (1-D)] + [2 x VD x IL x tD x fPWM]

  • PLS2 = [RDS(ON) × IL2 x D] + [VM x IL x tRF x fPWM]

Where,

  • RDS(ON) = ON resistance of each FET

    • For DRV8262-Q1 in dual H-bridge mode, it is typically 50 mΩ at 25 °C, and 85 mΩ at 150 °C.

  • fPWM = PWM switching frequency
  • VM = Supply voltage to the driver
  • IL = Motor RMS current
  • D = PWM duty cycle (between 0 and 1)

  • tRF = Output voltage rise/ fall time

    • For DRV8262-Q1, the rise/fall time is 110 ns

  • VD = FET body diode forward bias voltage

    • For DRV8262-Q1, it is 1 V

  • tD = dead time

    • For DRV8262-Q1, it is 300 ns

For estimating power dissipation for load current flow in the reverse direction, identical equations apply, with only swapping of HS1 with HS2 and LS1 with LS2.

Substituting the following values in the equations above -

  • VM = 24 V

  • IL = 4 A

  • RDS(ON) = 50 mΩ

  • D = 0.5

  • VD = 1 V

  • tD = 300 ns

  • tRF = 110 ns

  • fPWM = 20 kHz

The losses in each FET can be calculated as follows -

PHS1 = 50 mΩ × 42 = 0.8 W

PLS1 = 0

PHS2 = [50 mΩ × 42 x (1-0.5)] + [2 x 1 V x 4 A x 300 ns x 20 KHz] = 0.448 W

PLS2 = [ 50 mΩ × 42 x 0.5] + [24 x 4 A x 110 ns x 20 kHz] = 0.611 W

Quiescent Current Loss PQ = 24 V × 5 mA = 0.12 W

PTOT = 2 x (PHS1 + PLS1 + PHS2 + PLS2) + PQ = 2 x (0.8 + 0 + 0.448 + 0.611) + 0.12 = 3.84 W