JAJSN64 January 2022 DRV8316-Q1
PRODUCTION DATA
The DRV8316-Q1 device is an integrated95-mΩ (combined high-side and low-side MOSFET's on-state resistance) driver for 3-phase motor-drive applications. The device reduces system component count, cost, and complexity by integrating three half-bridge MOSFETs, gate drivers, charge pump, current sense amplifiers, linear regulator for the external load and buck regulator. A standard serial peripheral interface (SPI) provides a simple method for configuring the various device settings and reading fault diagnostic information through an external controller. Alternatively, a hardware interface (H/W) option allows for configuring the most commonly used settings through fixed external resistors.
The architecture uses an internal state machine to protect against short-circuit events, and protect against dv/dt parasitic turnon of the internal power MOSFET.
The DRV8316-Q1 device integrates three, bidirectional current-sense amplifiers for monitoring the current level through each of the half-bridges using a built-in current sense. The gain setting of the amplifier can be adjusted through the SPI or hardware interface.
In addition to the high level of device integration, the DRV8316-Q1 device provides a wide range of integrated protection features. These features include power-supply undervoltage lockout (UVLO), charge-pump undervoltage lockout (CPUV), overcurrent protection (OCP), AVDD undervoltage lockout (AVDD_UV), buck regulator ULVO for DRV8316-Q1 and overtemperature shutdown (OTW and OTSD). Fault events are indicated by the nFAULT pin with detailed information available in the SPI registers on the SPI device version.
The DRV8316R-Q1 and DRV8316T-Q1 device are available in 0.5-mm pin pitch, VQFN surface-mount packages. The VQFN package size is 7 mm × 5 mm.