JAJSSZ1
December 2023
DRV8334
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
5.1
Pin Functions 48-Pin DRV8334
6
Specification
6.1
Absolute Maximum Ratings
6.2
ESD Ratings DRV8334
6.3
Recommended Operating Conditions
6.4
Thermal Information DRV8334
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
SPI Timing Diagrams
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Three BLDC Gate Drivers
7.3.1.1
PWM Control Modes
7.3.1.1.1
6x PWM Mode
7.3.1.1.2
3x PWM Mode with INLx enable control
7.3.1.1.3
3x PWM Mode with SPI enable control
7.3.1.1.4
1x PWM Mode
7.3.1.1.5
SPI Gate Drive Mode
7.3.1.2
Gate Drive Architecture
7.3.1.2.1
Bootstrap diode
7.3.1.2.2
GVDD Charge pump
7.3.1.2.3
VCP Trickle Charge pump
7.3.1.2.4
Gate Driver Output
7.3.1.2.5
Passive and Semi-active pull-down resistor
7.3.1.2.6
TDRIVE Gate Drive Timing Control
7.3.1.2.7
Propagation Delay
7.3.1.2.8
Deadtime and Cross-Conduction Prevention
7.3.2
Low-Side Current Sense Amplifiers
7.3.2.1
Unidirectional Current Sense Operation
7.3.2.2
Bidirectional Current Sense Operation
7.3.3
Gate Driver Shutdown
7.3.3.1
DRVOFF Gate Driver Shutdown
7.3.3.2
Gate Driver Shutdown Timing Sequence
7.3.4
Gate Driver Protective Circuits
7.3.4.1
PVDD Supply Undervoltage Lockout (PVDD_UV)
7.3.4.2
GVDD Undervoltage Lockout (GVDD_UV)
7.3.4.3
BST Undervoltage Lockout (BST_UV)
7.3.4.4
MOSFET VDS Overcurrent Protection (VDS_OCP)
7.3.4.5
VSENSE Overcurrent Protection (SEN_OCP)
7.3.4.6
Phase Comparators
7.3.4.7
Thermal Shutdown (OTSD)
7.3.4.8
Thermal Warning (OTW)
7.3.4.9
OTP CRC
7.3.4.10
SPI Watchdog Timer
7.4
Device Functional Modes
7.4.1
Gate Driver Functional Modes
7.4.1.1
Sleep Mode
7.4.1.2
Operating Mode
7.4.2
Device Power Up Sequence
7.5
Programming
7.5.1
SPI
7.5.2
SPI Format
7.5.3
SPI Format Diagrams
7.6
Register Maps
7.6.1
STATUS Registers
7.6.2
CONTROL Registers
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Typical Application with 48-pin package
8.2.1.1
External Components
8.2.2
Application Curves
9
Layout
9.1
Layout Guidelines
9.2
Layout Example
10
Device and Documentation Support
10.1
Documentation Support
10.1.1
Related Documentation
10.2
Receiving Notification of Documentation Updates
10.3
Community Resources
10.4
Trademarks
11
Mechanical, Packaging, and Orderable Information
11.1
Package Option Addendum
11.2
Tape and Reel Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
PHP|48
MPQF051B
サーマルパッド・メカニカル・データ
PHP|48
PPTD389
発注情報
jajssz1_oa
7.3.4
Gate Driver Protective Circuits