JAJSGQ9A March 2018 – April 2019 DRV8343-Q1
PRODUCTION DATA.
The DRV8343-Q1 device is protected against VM undervoltage, charge pump undervoltage, MOSFET VDS overcurrent, gate driver shorts, and overtemperature events. The DRV8343-Q1 device also provides a detection mechanism for open-load, offline short-to-supply, and offline short-to-ground conditions. When a fault occurs, the individual fault bit is set high along with the global FAULT bit in the FAULT status register for the SPI device. The FAULT bit is OR’ed with all the other individual status bits. In the H/W device, only the nFAULT pin is driven low during a fault condition. Some of the protection and detection features can be disabled through SPI in the SPI device, or the nDIAG pin in the H/W device
FAULT | CONDITION | CONFIGURATION | REPORT | GATE DRIVER | LOGIC | RECOVERY |
---|---|---|---|---|---|---|
VM undervoltage
(UVLO) |
VVM < VUVLO | — | nFAULT | Hi-Z | Disabled | Automatic:
VVM > VUVLO |
Charge pump undervoltage
(CPUV) |
VVCP < VCPUV | DIS_CPUV = 0b | nFAULT | Hi-Z | Active | Automatic:
VVCP > VCPUV |
DIS_CPUV = 1b | None | Active | Active | |||
VDS overcurrent
(VDS_OCP) |
VDS > VVDS_OCP | OCP_MODE = 00b | nFAULT | Hi-Z | Active | Latched:
CLR_FLT, ENABLE Pulse |
OCP_MODE = 01b | nFAULT | Hi-Z | Active | Retry:
tRETRY |
||
OCP_MODE = 10b | nFAULT | Active | Active | Report only | ||
OCP_MODE = 11b | None | Active | Active | No action | ||
VSENSE overcurrent
(SEN_OCP) |
VSP > VSEN_OCP | OCP_MODE = 00b | nFAULT | Hi-Z | Active | Latched:
CLR_FLT, ENABLE Pulse |
OCP_MODE = 01b | nFAULT | Hi-Z | Active | Retry:
tRETRY |
||
OCP_MODE = 10b | nFAULT | Active | Active | Report only | ||
OCP_MODE = 11b | None | Active | Active | No action | ||
Gate driver fault
(GDF) |
Gate voltage stuck > tDRIVE | DIS_GDF = 0b | nFAULT | Hi-Z | Active | Latched:
CLR_FLT, ENABLE Pulse |
DIS_GDF = 1b | None | Active | Active | No action | ||
Thermal warning
(OTW) |
TJ > TOTW | OTW_REP = 0b | None | Active | Active | No action |
OTW_REP = 1b | nFAULT | Active | Active | Automatic:
TJ < TOTW – THYS |
||
Thermal shutdown
(OTSD) |
TJ > TOTSD | OTSD_MODE = 0b | nFAULT | Hi-Z | Active | Latched:
CLR_FLT, ENABLE Pulse |
OTSD_MODE = 1b | nFAULT | Hi-Z | Active | Automatic:
TJ < TOTSD – THYS |
||
Open load passive
(OLP) |
No load detected | EN_OLP = 0b | None | Hi-Z | Active | No action |
EN_OLP = 1b | nFAULT | Hi-Z | Active | Report only | ||
Open load active
(OLA) |
No load detected | EN_OLA_X = 0b | None | Active | Active | No action |
EN_OLA_X = 1b | nFAULT | Active | Active | Report only | ||
Offline short-to-supply
(SHT_BAT) |
Phase node short-to-supply | EN_SHT_TST = 0b | None | Hi-Z | Active | No action |
EN_SHT_TST = 1b | nFAULT | Hi-Z | Active | Report only | ||
Offline short-to-ground
(SHT_GND) |
Phase node short-to-ground | EN_SHT_TST = 0b | None | Hi-Z | Active | No action |
EN_SHT_TST = 1b | nFAULT | Hi-Z | Active | Report only | ||
Device internal memory (1)data fault | Memory checksum fault detected | — | nFAULT | Active | Active | No action |