JAJSPD5C
June 2011 – December 2022
DRV8662
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Fast Start-up (Enable Pin)
7.3.2
Gain Control
7.3.3
Adjustable Boost Voltage
7.3.4
Adjustable Boost Current Limit
7.3.5
Internal Charge Pump
7.3.6
Thermal Shutdown
7.4
Device Functional Modes
7.4.1
Startup/shutdown Sequencing
7.4.1.1
PWM Source
7.4.1.2
DAC Source
7.4.2
Low-voltage Operation
7.5
Programming
7.5.1
Programming the Boost Voltage
7.5.2
Programing the Boost Current Limit
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
DRV8662 System Diagram with DAC Input
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.2.1
Inductor Selection
8.2.1.2.2
Piezo Actuator Selection
8.2.1.2.3
Boost Capacitor Selection
8.2.1.2.4
Current Consumption Calculation
8.2.1.2.5
Input Filter Considerations
8.2.1.3
Application Curves
8.2.2
DRV8662 System Diagram with Filtered Single-Ended PWM Input
8.2.2.1
Design Requirements
8.2.2.2
Detailed Design Procedure
8.2.2.2.1
Input Filter Design
8.2.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
Trademarks
12
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RGP|20
MPQF126G
サーマルパッド・メカニカル・データ
RGP|20
QFND079Y
発注情報
jajspd5c_oa
jajspd5c_pm
7.2
Functional Block Diagram