JAJSPD5C June   2011  – December 2022 DRV8662

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fast Start-up (Enable Pin)
      2. 7.3.2 Gain Control
      3. 7.3.3 Adjustable Boost Voltage
      4. 7.3.4 Adjustable Boost Current Limit
      5. 7.3.5 Internal Charge Pump
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Startup/shutdown Sequencing
        1. 7.4.1.1 PWM Source
        2. 7.4.1.2 DAC Source
      2. 7.4.2 Low-voltage Operation
    5. 7.5 Programming
      1. 7.5.1 Programming the Boost Voltage
      2. 7.5.2 Programing the Boost Current Limit
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 DRV8662 System Diagram with DAC Input
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Inductor Selection
          2. 8.2.1.2.2 Piezo Actuator Selection
          3. 8.2.1.2.3 Boost Capacitor Selection
          4. 8.2.1.2.4 Current Consumption Calculation
          5. 8.2.1.2.5 Input Filter Considerations
        3. 8.2.1.3 Application Curves
      2. 8.2.2 DRV8662 System Diagram with Filtered Single-Ended PWM Input
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Input Filter Design
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Trademarks
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.4.2 Low-voltage Operation

The lowest gain setting is optimized for 50 VPP with a boost voltage of 30 V. Some applications may not need 50 VPP, so the user may elect to program the boost converter as low as 15 V to improve efficiency. When using boost voltages lower than 30 V, some special considerations are in order. First, to reduce boost ripple to an acceptable level, a 50 V rated, 0.22 µF boost capacitor is recommended. Second, the full-scale input range may need adjustment to avoid clipping. Normally, a 1.8 V, single-ended PWM signal will give 50 VPP at the lowest gain. For example, if the boost voltage is set to 25 V for a 40 VPP full-scale output signal, the full-scale input range drops to 1.44 V for single-ended PWM inputs. An input voltage divider may be desired in this case if a 1.8V I/O is used as a PWM source.