SLLSEL7B October 2014 – April 2024 DRV8848
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
POWER SUPPLIES (VM, VINT) | ||||||
VVM | VM operating voltage | 4 | 18 | V | ||
IVM | VM operating supply current | VVM = 12 V, excluding winding current, nSLEEP = 1 |
1.2 | 1.35 | 1.5 | mA |
IVMQ | VM sleep mode supply current | VVM = 12V, nSLEEP = 0 | 0.5 | 1.2 | 3 | μA |
tSLEEP | Sleep time | nSLEEP = 0 to sleep mode | 1 | ms | ||
tWAKE | Wake time | nSLEEP = 1 to output transition | 1 | ms | ||
tON | Power-on time | VVM > VUVLO rising to output transition | 1 | ms | ||
VINT | VINT voltage | VVM > 4 V, IOUT = 0 A to 1 mA | 3.13 | 3.3 | 3.47 | V |
LOGIC-LEVEL INPUTS (BIN1, BIN2, NSLEEP) | ||||||
VIL | Input logic low voltage | 0 | 0.7 | V | ||
VIH | Input logic high voltage | 1.6 | 5.5 | V | ||
VHYS | Input logic hysteresis | 100 | mV | |||
IIL | Input logic low current | VI = 0 V | -1 | 1 | µA | |
IIH | Input logic high current | VI = 5 V | 1 | 30 | µA | |
RPD | Pulldown resistance | BIN1, BIN2 | 200 | kΩ | ||
RPD | Pulldown resistance | nSLEEP | 500 | kΩ | ||
tDEG | Input deglitch time | AIN1 or AIN2 | 400 | ns | ||
tDEG | Input deglitch time | BIN1 or BIN2 | 200 | ns | ||
tPROP | Propagation delay | AIN1 or AIN2 edge to output change | 800 | ns | ||
tPROP | Propagation delay | BIN1 or BIN2 edge to output change | 400 | ns | ||
TRI-LEVEL INPUTS (AIN1, AIN2) | ||||||
VIL | Tri-level input logic low voltage | 0 | 0.7 | V | ||
VIZ | Tri-level input Hi-Z voltage | 1.1 | V | |||
VIH | Tri-level input logic high voltage | 1.6 | 5.5 | V | ||
VHYS | Tri-level input hysteresis | 100 | mV | |||
IIL | Tri-level input logic low current | VIN = 0 V | -30 | -1 | µA | |
IIH | Tri-level input logic high current | VIN = 5 V | 1 | 30 | µA | |
RPD | Tri-level pulldown resistance | To GND | 170 | kΩ | ||
RPU | Tri-level pullup resistance | To VINT | 340 | kΩ | ||
CONTROL OUTPUTS (NFAULT) | ||||||
VOL | Output logic low voltage | IO = 5 mA | 0.5 | V | ||
IOH | Output logic high leakage | VO = 3.3 V | -1 | 1 | µA | |
MOTOR DRIVER OUTPUTS (AOUT1, AOUT2, BOUT1, BOUT2) | ||||||
RDS(ON) | High-side FET on resistance | VVM = 12 V, IO = 0.5 A, TJ = 25°C | 550 | mΩ | ||
RDS(ON) | High-side FET on resistance | VVM = 12 V, IO = 0.5 A, TJ = 85°C(1) | 660 | mΩ | ||
RDS(ON) | Low-side FET on resistance | VVM = 12 V, IO = 0.5 A, TJ = 25°C | 350 | mΩ | ||
RDS(ON) | Low-side FET on resistance | VVM = 12 V, IO = 0.5 A, TJ = 85°C(1) | 420 | mΩ | ||
IOFF | Off-state leakage current | VVM = 5 V, TJ = 25°C | -1 | 1 | μA | |
tRISE | Output rise time | 60 | ns | |||
tFALL | Output fall time | 60 | ns | |||
tDEAD | Output dead time | Internal dead time | 200 | ns | ||
PWM CURRENT CONTROL (VREF, AISEN, BISEN) | ||||||
IREF | Externally applied VREF input current | VVREF = 1 to 3.3 V | 1 | μA | ||
VTRIP | xISEN trip voltage | For 100% current step with VVREF = 3.3 V | 500 | mV | ||
tBLANK | Current sense blanking time | 1.8 | μs | |||
AISENSE | Current sense amplifier gain | Reference only | 6.6 | V/V | ||
tOFF | Current control constant off time | 20 | μs | |||
PROTECTION CIRCUITS | ||||||
VUVLO | VM undervoltage lockout | VVM falling; UVLO report | 2.9 | V | ||
VVM rising; UVLO recovery | 3 | V | ||||
IOCP | Overcurrent protection trip level | 2 | A | |||
tDEG | Overcurrent deglitch time | 2.8 | µs | |||
tOCP | Overcurrent protection period | 1.6 | ms | |||
TTSD(1) | Thermal shutdown temperature | Die temperature TJ | 150 | 160 | 180 | °C |
THYS(1) | Thermal shutdown hysteresis | Die temperature TJ | 50 | °C |