JAJSM96 may   2023 DRV8849

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Indexer Timing Requirements
    7. 7.7 Typical Operating Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Stepper Motor Driver Current Ratings
        1. 8.3.1.1 Peak Current Rating
        2. 8.3.1.2 RMS Current Rating
        3. 8.3.1.3 Full-Scale Current Rating
      2. 8.3.2 Microstepping Indexer
      3. 8.3.3 Controlling VREF with an MCU DAC
      4. 8.3.4 Current Regulation and Decay Modes
        1. 8.3.4.1 Smart tune Ripple Control
        2. 8.3.4.2 Smart tune Dynamic Decay
        3. 8.3.4.3 Blanking time
      5. 8.3.5 Charge Pump
      6. 8.3.6 Logic Level, tri-level and quad-level Pin Diagrams
      7. 8.3.7 nFAULT Pins
      8. 8.3.8 Protection Circuits
        1. 8.3.8.1 VM Undervoltage Lockout (UVLO)
        2. 8.3.8.2 VCP Undervoltage Lockout (CPUV)
        3. 8.3.8.3 Overcurrent Protection (OCP)
          1. 8.3.8.3.1 Latched Shutdown
          2. 8.3.8.3.2 Automatic Retry
        4. 8.3.8.4 Thermal Shutdown (OTSD)
          1. 8.3.8.4.1 Latched Shutdown
          2. 8.3.8.4.2 Automatic Retry
        5. 8.3.8.5 Fault Condition Summary
    4. 8.4 Device Functional Modes
      1. 8.4.1 Sleep Mode (nSLEEP = 0)
      2. 8.4.2 Disable Mode (nSLEEP = 1, ENABLE = 0)
      3. 8.4.3 Operating Mode (nSLEEP = 1, ENABLE = Hi-Z/1)
      4. 8.4.4 nSLEEP Reset Pulse
      5. 8.4.5 Functional Modes Summary
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Stepper Motor Speed
        2. 9.2.2.2 Current Regulation
        3. 9.2.2.3 Decay Modes
        4. 9.2.2.4 Application Curves
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Bulk Capacitance
  12. 11デバイスおよびドキュメントのサポート
    1. 11.1 関連資料
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Pin Configuration and Functions

GUID-20230424-SS0I-XS8F-5ZDC-RPLCCLTKQJV1-low.svgFigure 6-1 RHH Package, 36-Pin QFN, Top View
Table 6-1 Pin Functions
PINI/O(1)DESCRIPTION
NAMENO.

OUT1A

2

O

H-Bridge 1 Output A

OUT1B

4

O

H-Bridge 1 Output B

OUT2A

8

O

H-Bridge 2 Output A

OUT2B

6

O

H-Bridge 2 Output B

OUT3A

26

O

H-Bridge 3 Output A

OUT3B

24

O

H-Bridge 3 Output B

OUT4A

20

O

H-Bridge 4 Output A

OUT4B

22

O

H-Bridge 4 Output B

PGND1

3

G

Power ground pin for H-Bridge 1. Connect all ground pins together near the IC.

PGND2

7

G

Power ground pin for H-Bridge 2. Connect all ground pins together near the IC.

PGND3

25

G

Power ground pin for H-Bridge 3. Connect all ground pins together near the IC.

PGND4

21

G

Power ground pin for H-Bridge 4. Connect all ground pins together near the IC.

GND

16, 30

G

Analog ground. Connect all ground pins together near the IC.

VM1

5

P

Supply Voltage. VM1 should be connected to VM2 pin close to the device.

VM2

23

P

Supply Voltage. VM2 should be connected to VM1 pin close to the device.
VCP

31

P

Reservoir Capacitor Terminal

CP1

32

P

Charge Pump Capacitor Terminal

CP2

33

P

Charge Pump Capacitor Terminal

DECAY1

19

I

Decay mode setting pin for Stepper 1

DECAY2

17

I

Decay mode setting pin for Stepper 2

STEP1

18

I

Step input signal for Stepper 1

STEP2

10

I

Step input signal for Stepper 2

DIR1

34

I

Direction input signal for Stepper 1

DIR2

36

I

Direction input signal for Stepper 2

nSLEEP

11

I

Sleep mode input. Logic high to enable device; logic low to enter low-power sleep mode. An nSLEEP low pulse clears latched faults.

VREF1

13

I

Reference voltage input to set the full scale chopping current for Stepper 1

VREF2

15

I

Reference voltage input to set the full scale chopping current for Stepper 2

ENABLE1

28

I

Enable input for Stepper 1. Logic low on this input disables (Hi-Z) the outputs of Stepper 1.

ENABLE2

9

I

Enable input for Stepper 2. Logic low on this input disables (Hi-Z) the outputs of Stepper 2.

MODE01

29

I

Microstep setting inputs for Stepper 1

MODE11

35

I

MODE02

27

I

Microstep setting inputs for Stepper 2

MODE12

1

I

nFAULT1

12

O

Fault diagnostics output for Stepper 1

nFAULT2

14

O

Fault diagnostics output for Stepper 2

PAD

-

-

Exposed pad for enhanced thermal performance. Should be soldered to the PCB.
(1) I = Input, O = Output, I/O = Input or Output, G = Ground, P = Power.