JAJSI17D November 2013 – October 2019 DRV8850
PRODUCTION DATA.
PARAMETER | TEST CONDITIONS | MIN | NOM | MAX | UNIT | |
---|---|---|---|---|---|---|
POWER SUPPLIES (VCC) | ||||||
IVCC | VCC operating supply current, LDO regulator and driver enabled | VCC = 4.2 V,
nSLEEP = LDOEN = VCC |
2.9 | mA | ||
IVCQ1 | VCC sleep mode supply current | VCC = 4.2 V, nSLEEP = LDOEN = 0 V,
INXH = INXL = 0 V |
1 | μA | ||
IVCQ2 | VCC operating supply current, LDO regulator enabled, driver disabled(1) | VCC = 4.2 V, nSLEEP = 0 V,
LDOEN = VCC, INXH = INXL = 0 V |
40 | μA | ||
IVCQ3 | VCC operating supply current LDO voltage regulator disabled, driver enabled | VCC = 4.2 V, nSLEEP = VCC,
LDOEN = 0 V |
2.9 | mA | ||
VUVLO | VCC undervoltage lockout voltage | VCC rising | 2 | V | ||
VCC falling | 1.95 | |||||
VOVLO | VCC overvoltage lockout voltage | VCC rising | 5.6 | V | ||
VCC falling | 5.5 | |||||
LOGIC-LEVEL INPUTS (LDOEN, IN1H, IN1L, IN2H, IN2L, nSLEEP) | ||||||
VIL | Input low voltage | 0 | 0.2 × VCC | V | ||
VIH | Input high voltage | 0.5 × VCC | VCC | V | ||
VHYS | Input hysteresis | 0.08 × VCC | V | |||
IIL | Input low current | VIN = 0 | –1 | 1 | μA | |
IIH | Input high current | VIN = 3.3 V | 50 | μA | ||
RPD | Pulldown resistance | LDOEN | 3.5 | MΩ | ||
nSLEEP | 400 | kΩ | ||||
INXH, INXL | 200 | kΩ | ||||
VPROPI OUTPUT (VPROPI) | ||||||
IVPROPI | VPROPI output current | VCC = 4.2 V, resistor chosen to keep VPROPI ≤ (VCC – 1 V) / IOUT
500 mA ≤ IOUT ≤ 5 A |
IOUT / 2000 | A | ||
H-BRIDGE FETS (OUT1, OUT2) | ||||||
RDS(ON) | HS FET on resistance | VCC = 4.2 V, IOUT = 2 A, TA = 25°C | 35 | 45 | mΩ | |
VCC = 4.2 V, IOUT = 2 A, TA = 85°C | 49 | |||||
LS FET on resistance | VCC = 4.2 V, IOUT = 2 A, TA = 25°C | 30 | 40 | mΩ | ||
VCC = 4.2 V, IOUT = 2 A, TA = 85°C | 44 | |||||
IOFF | Off-state leakage current | VOUT = 0 V | –1 | 1 | μA | |
LDO REGULATOR (LDOOUT) | ||||||
VFB | LDO feedback (reference) voltage | 0.76 | 0.8 | 0.84 | V | |
VDO | LDO regulator dropout voltage | VCC = 4.2 V, IOUT = 100 mA,
TA = 25°C |
150 | mV | ||
VCC = 4.2 V, IOUT = 100 mA,
TA = 85°C |
175 | mV | ||||
ΔVLINE | LDO line regulation | VCC from 4.2 to 5.5 V,
VOUT = 3.3 V |
–2.5% | 2.5% | ||
ΔVLOAD | LDO load regulation | VOUT = 3.3 V,
IOUT from 1 to 100 mA |
–2.5% | 2.5% | ||
ICL | LDO output current limit | VCC = 4.2 V,
VOUT = 3.3 V, TA ≥ 25°C |
275 | mA | ||
PROTECTION CIRCUITS | ||||||
IOCP | Overcurrent protection trip level | VCC = 2.5 to 5.5 V | 9.5 | A | ||
tOCP | Overcurrent protection deglitch time | 1 | µs | |||
tRETRY | Overcurrent retry time | 4 | ms | |||
tTSD | Thermal shutdown temperature | Die temperature (rising) | 150 | 160 | 180 | °C |
tHYS | Thermal shutdown hysteresis | Temperature hysteresis | 50 | °C |