SLVSET1 August 2018 DRV8873
PRODUCTION DATA.
IC2 control is shown in Figure 33 and described in Table 25.
Read/Write
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ITRIP_REP | TSD_MODE | OTW_REP | DIS_CPUV | OCP_TRETRY | OCP_MODE | ||
R/W-0b | R/W-0b | R/W-0b | R/W-0b | R/W-11b | R/W-00b |
Bit | Field | Type | Default | Description |
---|---|---|---|---|
7 | ITRIP_REP | R/W | 0b |
0b = ITRIP is not reported on nFAULT or the FAULT bit 1b = ITRIP is reported on nFAULT and the FAULT bit |
6 | TSD_MODE | R/W | 0b |
0b = Overtemperature condition causes a latched fault 1b = Overtemperature condition causes an automatic recovery fault |
5 | OTW_REP | R/W | 0b |
0b = OTW is not reported on nFAULT or the FAULT bit 1b = OTW is reported on nFAULT and the FAULT bit |
4 | DIS_CPUV | R/W | 0b |
0b = Charge pump undervoltage fault is enabled 1b = Charge pump undervoltage fault is disabled |
3-2 | OCP_TRETRY | R/W | 11b |
00b = Overcurrent retry time is 0.5 ms 01b = Overcurrent retry time is 1 ms 10b = Overcurrent retry time is 2 ms 11b = Overcurrent retry time is 4 ms |
1-0 | OCP_MODE | R/W | 00b |
00b = Overcurrent condition causes a latched fault 01b = Overcurrent condition causes an automatic retrying fault 10b = Overcurrent condition is report only but no action is taken 11b = Overcurrent condition is not reported and no action is taken |