SNLS432C October 2012 – December 2015 DS125MB203
PRODUCTION DATA.
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The DS125MB203 is a high-performance circuit capable of delivering excellent performance. Pay careful attention to the details associated with high-speed design as well as providing a clean power supply. Refer to the information below and Revision 4 of the LVDS Owner's Manual for more detailed information on high speed design tips to address signal integrity design issues.
As with any high-speed design, there are many factors which influence the overall performance. Below are a list of critical areas for consideration and study during design:
The DS125MB203 is designed to be placed at an offset location with respect to the overall channel attenuation. To optimize performance, the repeater requires tuning to extend the reach of the cable or trace length while also recovering a solid eye opening. To tune the mux-buffer, the settings mentioned in Table 2 and Table 3 are recommended as a default starting point for most applications. Once these settings are configured, additional tuning of the EQ and, to a lesser extent, VOD may be required to optimize the repeater performance for each specific application environment.
Examples of the repeater performance as a generic high-speed datapath repeater are shown in the performance curves in the Application Curves section.