SNLS375C June   1998  – January 2015 DS26C31T

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Device Logic Diagram
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Recommended Operating Conditions
    3. 7.3 DC Electrical Characteristics
    4. 7.4 Switching Characteristics
    5. 7.5 Comparison Table of Switching Characteristics into “LS-Type” Load
    6. 7.6 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Related Links
    2. 13.2 Trademarks
    3. 13.3 Electrostatic Discharge Caution
    4. 13.4 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

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10 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

10.1 Application Information

The DS26C31 is a quad differential line driver designed for applications that require long distance digital data transmission over balanced cables. The DS26C31 can be used in applications that require conversion from TTL or CMOS input levels to differential signal levels, compatible to RS-422. The use of complimentary signaling in a balanced transmission media provides good immunity in the midst of noisy environments or shifts in ground reference potential.

10.2 Typical Application

Figure 28 depicts a typical implementation of the DS26C31x device in a RS-422 application.

00857409.png
*RT is optional although highly recommended to reduce reflection.
Figure 28. Two-Wire Balanced System, RS-422

10.2.1 Design Requirements

  • Apply TTL or LVCMOS signal to driver input lines INPUT A-D.
  • Transmit complementary outputs at OUTPUT A-D.
  • Use controlled-impedance transmission lines such as printed circuit board traces, twisted-pair wires or parallel wire cable.
  • Place a terminating resistor at the far end of the differential pair.

10.2.2 Detailed Design Procedure

  • Connect VCC and GND pins to the power and ground planes of the PCB with a 0.1-µF bypass capacitor.
  • Use TTL/LVCMOS logic levels at INPUT A-D.
  • Use controlled-impedance transmission media for the differential output signals.
  • Place an optional terminating resistor at the far-end of the differential pair to avoid reflection.

10.2.3 Application Curves

00857430.pngFigure 29. No Load Supply Current vs Data Rate
00857431.pngFigure 30. Loaded Supply Current vs Data Rate