JAJSRP0
October 2023
DS320PR410
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
DC Electrical Characteristics
6.6
High Speed Electrical Characteristics
6.7
SMBUS/I2C Timing Charateristics
6.8
Typical Characteristics
6.9
Typical Jitter Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Linear Equalization
7.3.2
Flat-Gain
7.3.3
Receiver Detect State Machine
7.4
Device Functional Modes
7.4.1
Active PCIe Mode
7.4.2
Active Buffer Mode
7.4.3
Standby Mode
7.5
Programming
7.5.1
Pin mode
7.5.1.1
Five-Level Control Inputs
7.5.2
SMBUS/I2C Register Control Interface
7.5.2.1
Shared Registers
7.5.2.2
Channel Registers
7.5.3
SMBus/I 2 C Primary Mode Configuration (EEPROM Self Load)
8
Application and Implementation
8.1
Application Information
8.2
Typical Applications
8.2.1
PCIe Reach Extension – x16 Lane Configuration
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.3
Application Curves
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
ドキュメントの更新通知を受け取る方法
9.2
サポート・リソース
9.3
Trademarks
9.4
静電気放電に関する注意事項
9.5
用語集
10
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RNQ|40
MPQF457A
サーマルパッド・メカニカル・データ
発注情報
jajsrp0_oa
8.4.2
Layout Example
Figure 8-7
Layout Example: TI PCIe 5.0 Riser Card Using DS320PR410 With CEM Connectors - Top Layer
Figure 8-8
Layout Example: TI PCIe 5.0 Riser Card Using DS320PR410 With CEM Connectors - Bottom Layer