If MODE = L2 (SMBus/I²C Secondary control mode), then the DS320PR822 is configured through a standard I²C or SMBus interface that may operate up to 400 kHz. The secondary address of the DS320PR822 is determined by the pin strap settings on the ADDR1 and ADDR0 pins. Note: secondary addresses to access channels 0-3 (Bank 0) and channels 4-7 (Bank 1) are different. Channel Bank 1 has address which is Channel Bank 0 address +1. The sixteen possible secondary addresses for each channel bank of the DS320PR822 are provided in Table 7-5. In SMBus/I²C modes the SCL and SDA pins must be pulled up to a 3.3 V supply with a pull-up resistor. The value of the resistor depends on total bus capacitance. 4.7 kΩ is a good first approximation for a bus capacitance of 10 pF.

The DS320PR822 has two types of registers:

• Shared Registers: these registers can be accessed at any time and are used for device-level configuration, status read back, control, or to read back the device ID information.
• Channel Registers: these registers are used to control and configure specific features for each individual channel. All channels have the same register set and can be configured independent of each other or configured as a group through broadcast writes to Bank 0 or Bank 1.

The DS320PR822 features two banks of channels, Bank 0 (Channels 0-3) and Bank 1 (Channels 4-7), each featuring a separate register set and requiring a unique SMBus secondary address.