SNLS374D May   1998  – January 2015 DS8921

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Electrical Characteristics
    5. 6.5 Receiver Switching Characteristics
    6. 6.6 Driver Switching Characteristics: Single-Ended Characteristics
    7. 6.7 Driver Switching Characteristics: Differential Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 AC Test Circuits and Switching Diagrams
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

The DS8921 is a differential line driver and receiver pair in a single package, designed for applications for the ST506, ST412, and ESDI Disk Drive Standards. The DS8921 is compatible to EIA RS-422 signaling standards, supporting 200-mV input sensitivity across a ±7-V common mode operating range. This transceiver is intended for driving differential signal across long transmission lines and translating received differential signals into their CMOS/TTL single-ended equivalence. The DS8921 transmits and reproduces received data in communications links where ground reference difference, or noisy environment are common.

9.2 Typical Application

Figure 11 shows a typical implementation of the DS8921x device in a ST506 and ST412 disk drive application. The differential outputs of the driver are connected to a twisted-pair transmission line, carrying data from the driver to the differential receiver at the other end of the cable. A differential termination resistor should be connected across the input pins of the receiver.

00851208.pngFigure 11. ST506 and ST412 Application

9.2.1 Design Requirements

  • Apply TTL or LVCMOS signal to driver input at DI
  • Transmit complementary outputs at DO+ and DO-
  • Receive complimentary input signals at RI+ and RI-
  • Receive TTL output signal at RO
  • Use controlled-impedance transmission lines such as printed circuit board traces, twisted-pair wires or parallel wire cable
  • Place terminating resistor at the far end of the differential pair

9.2.2 Detailed Design Procedure

  • Connect VCC and GND pins to the power and ground planes of the printed circuit board, with 0.1-uF bypass capacitor
  • Use TTL/LVCMOS logic levels at DI and RO
  • Use controlled-impedance transmission media for the differential signals DI+- and RO+-
  • Place a terminating resistor at the far-end of the differential pair to avoid reflection
  • Ensure the received complimentary signals at RO+ and RO- are within the signal threshold of ±200 mV

9.2.3 Application Curves

DriverInputScopeshot.gif
2.0 Mbps Single-Ended 1010 Data Pattern
Figure 12. Driver Single-Ended Input Signal
DriverOutputScopeshot.gif
2.0 Mbps Differential Data Pattern
Figure 14. Receiver Differential Input Signal
DriverOutputScopeshot.gif
2.0 Mbps Differential Data Pattern
Note: The input for the driver is Figure 12
Figure 13. Driver Differential Output Signal
ReceiverOutputScopeshot.gif
2.0 Mbps Single-Ended 1010 Data Pattern
Note: The input for the receiver is Figure 14
Figure 15. Receiver Single-Ended Output Signal