JAJSFF6B
june 2018 – september 2020
DS90C189-Q1
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Typical Application Diagrams
5
Revision History
6
Pin Configuration and Functions
DS90C189 Pin Descriptions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Recommended Input Characteristics
7.7
Switching Characteristics
7.8
AC Timing Diagrams
7.9
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagrams
8.3
Feature Description
8.3.1
AEC-Q100 Qualified
8.3.2
ESD Protection
8.3.3
Operating Modes
8.3.4
LVDS Configurations
8.4
Device Functional Modes
8.4.1
Device Configuration
8.4.2
Single Pixel Input / Single Pixel Output
8.4.3
Single Pixel Input / Dual Pixel Output
8.4.4
Pixel Clock Edge Select (RFB)
8.4.5
Power Management
8.4.6
Sleep Mode (PDB)
8.4.7
LVDS Outputs
8.4.8
LVCMOS Inputs
8.5
Programming
8.5.1
LVDS Interface / TFT Color Data Recommended Mapping
8.5.1.1
Color Mapping Information
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
LVDS Interconnect Guidelines
9.2.3
Application Curves
10
Power Supply Recommendations
10.1
Power Up Sequence
10.2
Power Supply Filtering
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
ドキュメントの更新通知を受け取る方法
12.3
サポート・リソース
12.4
Trademarks
12.5
静電気放電に関する注意事項
12.6
用語集
13
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RTD|64
MPQF141C
サーマルパッド・メカニカル・データ
発注情報
jajsff6b_oa
jajsff6b_pm
Data Sheet
DS90C189-Q1
低消費電力、1.8V の
RGB-to-Open LDI (LVDS) ブリッジ