The DS90UR241 and DS90UR124 supports AC-coupled interconnects through integrated DC balanced encoding/decoding scheme. To use the Serializer and Deserializer in an AC-coupled application, insert external AC-coupling capacitors in series in the LVDS signal path as illustrated in Figure 7-8. The Deserializer input stage is designed for AC-coupling by providing a built-in AC bias network which sets the internal V_CM to +1.8V. With AC signal coupling, capacitors provide the AC-coupling path to the signal input.

For the high-speed LVDS transmissions, the smallest available package must be used for the AC-coupling capacitor. This helps minimize degradation of signal quality due to package parasitics. The most common used capacitor value for the interface is a 100nF (0.1uF). NPO class 1 or X7R class 2 type capacitors are recommended. 50 WVDC must be the minimum used for the best system-level ESD performance.

A termination resistor across DOUT± and RIN± is also required for proper operation to be obtained. The termination resistor must be equal to the differential impedance of the media being driven and in the range of 90 to 132Ω. 100Ω is a typical value common used with standard 100Ω transmission media. This resistor is required for control of reflections and also completes the current loop. Place the resistor as close to the Serializer DOUT± outputs and Deserializer RIN± inputs to minimize the stub length from the pins. To match with the deferential impedance on the transmission line, the LVDS I/O are terminated with 100Ω resistors on Serializer DOUT± outputs pins and Deserializer RIN± input pins.