The DS90UR241 Serializer and DS90UR124 Deserializer chipset is an easy-to-use transmitter and receiver pair that sends 24-bits of parallel LVCMOS data over a single serial LVDS link from 120 Mbps to 1.03 Gbps throughput. The DS90UR241 transforms a 24-bit wide parallel LVCMOS data into a single high speed LVDS serial data stream with embedded clock and scrambles / DC Balances the data to enhance signal quality to support AC coupling. The DS90UR124 receives the LVDS serial data stream and converts it back into a 24-bit wide parallel data and recovered clock. The 24-bit Serializer/Deserializer chipset is designed to transmit data up to 10 meters over shielded twisted pair (STP) at clock speeds from 5MHz to 43MHz.

The Deserializer can attain lock to a data stream without the use of a separate reference clock source, greatly simplifying system complexity and overall cost. The Deserializer synchronizes to the Serializer regardless of data pattern, delivering true automatic “plug and lock” performance. It will lock to the incoming serial stream without the need of special training patterns or sync characters. The Deserializer recovers the clock and data by extracting the embedded clock information and validating data integrity from the incoming data stream and then deserializes the data. The Deserializer monitors the incoming clock information, determines lock status, and asserts the LOCK output high when lock occurs.

In addition, the Deserializer also supports an optional @SPEED BIST (Built In Self Test) mode, BIST error flag, and LOCK status reporting pin. Signal quality on the wide parallel output is controlled by the SLEW control and bank slew (PTOSEL) inputs to help reduce noise and system EMI. Each device has a power down control to enable efficient operation in various applications.