JAJSEP1A February   2018  – March 2018 ESD224

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     代表的なアプリケーションの回路図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings -JEDEC Specifications
    3. 6.3 ESD Ratings - IEC Specifications
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Setup
    1. 7.1 IEC 61000-4-2 System Level ESD Test Setup with HDMI Driver for Clamping Voltage Measurement
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 IEC 61000-4-2 ESD Protection
      2. 8.3.2 IEC 61000-4-4 EFT Protection
      3. 8.3.3 IEC 61000-4-5 Surge Protection
      4. 8.3.4 IO Capacitance
      5. 8.3.5 DC Breakdown Voltage
      6. 8.3.6 Ultra Low Leakage Current
      7. 8.3.7 Low ESD Clamping Voltage
      8. 8.3.8 Supports High Speed Interfaces
      9. 8.3.9 Industrial Temperature Range
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Signal Range
        2. 9.2.2.2 Operating Frequency
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.1 IEC 61000-4-2 System Level ESD Test Setup with HDMI Driver for Clamping Voltage Measurement

Figure 11 shows the setup used to perform System Level ESD test to evaluate the clamping performance of ESD224 in real-world applications where the device is protecting a downstream HDMI driver System-on-Chip. IEC 61000-4-2 8kV Contact stress was applied at the connector pin and the voltage waveform on the system-side pin was captured to look at the clamping voltage presented by ESD224 to the down stream HDMI driver.

ESD224 system_side_clamp.gifFigure 11. System Level IEC 61000-4-2 ESD Test Setup with ESD224 protecting an HDMI driver chip