SPRS825F October 2012 – June 2020 F28M36H33B2 , F28M36H53B2 , F28M36P53C2 , F28M36P63C2
PRODUCTION DATA.
The µCRC module snoops both the DCODE and SYSTEM buses to support CRC calculation for data and program. To allow interrupts execution in between CRC calculations for a block of data and to discard the Cortex-M3 literal pool accesses in between executions of the program (which reads data for CRC calculation), the Cortex-M3 ROM, Flash, and RAMs are mapped to a mirrored memory location. The µCRC module grabs data from the bus to calculate CRC only if the address of the read data belongs to mirrored memory space. After grabbing, the µCRC module performs the CRC calculation on the grabbed data and updates the µCRC Result Register (µCRCRES). This register can be read at any time to get the calculated CRC for all the previous read data. The µCRC module only supports CRC calculation for byte accesses. So, in order to calculate the CRC on a block of data, software must perform byte accesses to all the data. For half-word and word accesses, the µCRC module discards the data and does not update the µCRCRES register.
NOTE
If a read to a mirrored address space is thrown from the debugger (Code Composer Studio or any other debug platform), the µCRC module ignores the read data and does not update the CRC result for that particular read.