JAJSC67A May   2016  – October 2024 FDC2112-Q1 , FDC2114-Q1 , FDC2212-Q1 , FDC2214-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics - I2C
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Clocking Architecture
      2. 6.3.2 Multi-Channel and Single-Channel Operation
      3. 6.3.3 Current Drive Control Registers
      4. 6.3.4 Device Status Registers
      5. 6.3.5 Input Deglitch Filter
    4. 6.4 Device Functional Modes
      1. 6.4.1 Start-Up Mode
      2. 6.4.2 Normal (Conversion) Mode
      3. 6.4.3 Sleep Mode
      4. 6.4.4 Shutdown Mode
        1. 6.4.4.1 Reset
    5. 6.5 Programming
      1. 6.5.1 I2C Interface Specifications
    6. 6.6 Register Maps
      1. 6.6.1  Register List
      2. 6.6.2  Address 0x00, DATA_CH0
      3. 6.6.3  Address 0x01, DATA_LSB_CH0 (FDC2212 / FDC2214 only)
      4. 6.6.4  Address 0x02, DATA_CH1
      5. 6.6.5  Address 0x03, DATA_LSB_CH1 (FDC2212 / FDC2214 only)
      6. 6.6.6  Address 0x04, DATA_CH2 (FDC2114, FDC2214 only)
      7. 6.6.7  Address 0x05, DATA_LSB_CH2 (FDC2214 only)
      8. 6.6.8  Address 0x06, DATA_CH3 (FDC2114, FDC2214 only)
      9. 6.6.9  Address 0x07, DATA_LSB_CH3 (FDC2214 only)
      10. 6.6.10 Address 0x08, RCOUNT_CH0
      11. 6.6.11 Address 0x09, RCOUNT_CH1
      12. 6.6.12 Address 0x0A, RCOUNT_CH2 (FDC2114, FDC2214 only)
      13. 6.6.13 Address 0x0B, RCOUNT_CH3 (FDC2114, FDC2214 only)
      14. 6.6.14 Address 0x0C, OFFSET_CH0 (FDC21112 / FDC2114 only)
      15. 6.6.15 Address 0x0D, OFFSET_CH1 (FDC21112 / FDC2114 only)
      16. 6.6.16 Address 0x0E, OFFSET_CH2 (FDC2114 only)
      17. 6.6.17 Address 0x0F, OFFSET_CH3 (FDC2114 only)
      18. 6.6.18 Address 0x10, SETTLECOUNT_CH0
      19. 6.6.19 Address 0x11, SETTLECOUNT_CH1
      20. 6.6.20 Address 0x12, SETTLECOUNT_CH2 (FDC2114, FDC2214 only)
      21. 6.6.21 Address 0x13, SETTLECOUNT_CH3 (FDC2114, FDC2214 only)
      22. 6.6.22 Address 0x14, CLOCK_DIVIDERS_CH0
      23. 6.6.23 Address 0x15, CLOCK_DIVIDERS_CH1
      24. 6.6.24 Address 0x16, CLOCK_DIVIDERS_CH2 (FDC2114, FDC2214 only)
      25. 6.6.25 Address 0x17, CLOCK_DIVIDERS_CH3 (FDC2114, FDC2214 only)
      26. 6.6.26 Address 0x18, STATUS
      27. 6.6.27 Address 0x19, ERROR_CONFIG
      28. 6.6.28 Address 0x1A, CONFIG
      29. 6.6.29 Address 0x1B, MUX_CONFIG
      30. 6.6.30 Address 0x1C, RESET_DEV
      31. 6.6.31 Address 0x1E, DRIVE_CURRENT_CH0
      32. 6.6.32 Address 0x1F, DRIVE_CURRENT_CH1
      33. 6.6.33 Address 0x20, DRIVE_CURRENT_CH2 (FDC2114 / FDC2214 only)
      34. 6.6.34 Address 0x21, DRIVE_CURRENT_CH3 (FDC2114 / FDC2214 only)
      35. 6.6.35 Address 0x7E, MANUFACTURER_ID
      36. 6.6.36 Address 0x7F, DEVICE_ID
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Sensor Configuration
      2. 7.1.2 Shield
      3. 7.1.3 Power-Cycled Applications
      4. 7.1.4 Inductor Self-Resonant Frequency
      5. 7.1.5 Application Curves for Proximity Sensing
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Recommended Initial Register Configuration Values
      3. 7.2.3 Application Curve
    3. 7.3 Best Design Practices
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Examples
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.5.1 I2C Interface Specifications

The FDC uses an extended start sequence with I2C for register access. The maximum speed of the I2C interface is 400 kbit/s. This sequence follows the standard I2C 7-bit target address followed by an 8-bit pointer register byte to set the register address. When the ADDR pin is set low, the FDC I2C address is 0x2A; when the ADDR pin is set high, the FDC I2C address is 0x2B. The ADDR pin must not change state after the FDC exits Shutdown Mode.

FDC2112-Q1 FDC2114-Q1 FDC2212-Q1 FDC2214-Q1 I2C Write Register SequenceFigure 6-6 I2C Write Register Sequence
FDC2112-Q1 FDC2114-Q1 FDC2212-Q1 FDC2214-Q1 I2C Read Register SequenceFigure 6-7 I2C Read Register Sequence