JAJSSV1B December   2017  – January 2024 FPC202

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Host-Side Control Interface
      2. 7.3.2  LED Control
        1. 7.3.2.1 Configurations with up to eight LEDs per port
      3. 7.3.3  Low-Speed Output Signal Control
      4. 7.3.4  Low-Speed Input Status and Interrupt Generation
      5. 7.3.5  Downstream (Port-Side) I2C Master
      6. 7.3.6  Data Pre-Fetch From Modules
      7. 7.3.7  Scheduled Write
      8. 7.3.8  Protocol Timeouts
      9. 7.3.9  General-Purpose Inputs/Outputs
      10. 7.3.10 Hot-Plug Support
    4. 7.4 Device Functional Modes
      1. 7.4.1 I2C Host-Side Control Interface
      2. 7.4.2 SPI Host-Side Control Interface
        1. 7.4.2.1 SPI Frame Structure
        2. 7.4.2.2 SPI Read Operation
        3. 7.4.2.3 SPI Write Operation
    5. 7.5 Programming
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 SFP/QSFP Port Management
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power Supply Sequencing
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.5 Electrical Characteristics

TJ = -40 °C to 125 °C, VDD1 = 3.3 V ± 5%, VDD2 = 3.3 V ± 5% (unless otherwise noted).
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
POWER SUPPLY
WTOTALTotal device power dissipationVDD1 = VDD2 = 3.3 V, Outputs sourcing maximum current; S0_OUT_C, S0_OUT_D, S1_OUT_C, and S1_OUT_D are OFF (Vout = High)90110mW
VDD1 = 3.3 V, VDD2 = 2.5 V, Outputs sourcing maximum current; S0_OUT_C, S0_OUT_D, S1_OUT_C, and S1_OUT_D are OFF (Vout = High)100110mW
VDD1 = 3.3 V, VDD2 = 1.8 V, Outputs sourcing maximum current; S0_OUT_C, S0_OUT_D, S1_OUT_C, and S1_OUT_D are OFF (Vout = High)100120mW
IVDD1Current consumption for VDD1 supplyVDD1 = VDD2 = 3.3 V; S0_OUT_C, S0_OUT_D, S1_OUT_C, and S1_OUT_D are OFF (Vout = High)2631mA
VDD1 = VDD2 = 2.5 V; S0_OUT_C, S0_OUT_D, S1_OUT_C, and S1_OUT_D are OFF (Vout = High)2732
VDD1 = 3.3 V, VDD2 = 1.8 V; S0_OUT_C, S0_OUT_D, S1_OUT_C, and S1_OUT_D are OFF (Vout = High)2934mA
IVDD2Current consumption for VDD2 supplyVDD1 = VDD2 = 3.3 V, Outputs sourcing maximum current; S0_OUT_C, S0_OUT_D, S1_OUT_C, and S1_OUT_D are OFF (Vout = High)0.20.35mA
VDD1 = 3.3 V, VDD2 = 2.5 V, Outputs sourcing maximum current; S0_OUT_C, S0_OUT_D, S1_OUT_C, and S1_OUT_D are OFF (Vout = High)0.10.3mA
VDD1 = 3.3 V, VDD2 = 1.8 V, Outputs sourcing maximum current; S0_OUT_C, S0_OUT_D, S1_OUT_C, and S1_OUT_D are OFF (Vout = High)0.10.25mA
Itotal-idleTotal device supply current consumption in idle mode6.5mA
LVCMOS I/O DC SPECIFICATIONS
VIHHigh level input voltageApplies to S0_IN_A, S0_IN_B, S0_IN_C, S1_IN_A, S1_IN_B, S1_IN_C, PROTOCOL_SEL, and GPIO[3:0]2.03.465V
Applies to EN0.7*
VDD2		VDD2
VILLow level input voltageApplies to S0_IN_A, S0_IN_B, S0_IN_C, S1_IN_A, S1_IN_B, S1_IN_C, PROTOCOL_SEL, GPIO[3:0], and EN–0.30.8V
VOHHigh level output voltageApplies to S0_OUT_A, S0_OUT_B, and GPIO[3:0], IOH = –2 mA2.83.465V
Applies to S0_OUT_C, S0_OUT_D, S1_OUT_C, and S1_OUT_D, IOH = –50 µA2.5
VOLLow level output voltageApplies to S0_OUT_A, S0_OUT_B, and GPIO[3:0], IOL = 2 mAGND0.4V
Applies to S0_OUT_C, S0_OUT_D, S1_OUT_C, and S1_OUT_D, IOL = 18 mAGND0.4
IIHHigh level input currentApplies to S0_IN_A, S0_IN_B, S0_IN_C, S1_IN_A, S1_IN_B, S1_IN_C, and GPIO[3:0]–11µA
IILLow level input currentApplies to S0_IN_A, S0_IN_B, S0_IN_C, S1_IN_A, S1_IN_B, S1_IN_C–220–170µA
Applies to GPIO[3:0]–11µA
tSP-LSPulse width of spikes that are suppressed by FPC202 input de-glitch filter on all IN_* low-speed pinsPulses shorter than min are suppressed, and pulses longer than the max are not suppressed.3050µs
DOWNSTREAM MASTER I2C ELECTRICAL CHARACTERISTICS (MOD_SCL AND MOD_SDA)
VOLLow level output voltageIOL = 3 mAGND0.4V
VILLow level input voltage–0.31.04V
VIHHigh level input voltage2.193.465V
Cb(1)I2C bus capacitive load1.6 kΩ pull-up resistor max200pF
HOST-SIDE I2C ELECTRICAL CHARACTERISTICS (PROTOCOL_SEL=FLOAT/HIGH)
VIHInput high level voltageSDA (CTRL2) and SCL (CTRL1)0.7*
VDD2		VDD2V
VILInput low level voltageSDA (CTRL2) and SCL (CTRL1)0.3*
VDD2		V
CIN(1)Input pin capacitanceSDA (CTRL2) and SCL (CTRL1)0.51pF
VOLLow level output voltageSDA (CTRL2) or SCL (CTRL1), IOL = 3 mAGND0.4V
ILIL Leakage currentSDA (CTRL2) or SCL (CTRL1), VIN = VDD2–11μA
Cb(1)I2C bus capacitive load550pF
HOST-SIDE SPI ELECTRICAL CHARACTERISTICS (PROTOCOL_SEL=GND)
VIHInput high level voltageSCK (CTRL1), SS_N (CTRL2), and MOSI (CTRL3)0.7*
VDD2		V
VILInput low level voltageSCK (CTRL1), SS_N (CTRL2), and MOSI (CTRL3)0.3*
VDD2		V
CIN(1)Input pin capacitanceSCK (CTRL1), SS_N (CTRL2), and MOSI (CTRL3)0.51pF
VOHHigh level output voltageMISO (CTRL4) pin, IOH = –4 mA0.7*
VDD2		V
VOLLow level output voltageMISO (CTRL4) pin, IOL = 4 mAGND0.4V
ILLeakage currentMOSI (CTRL3)–220–170µA
SCK (CTRL1), SS_N (CTRL2), and MISO (CTRL4)–11μA
CMISO(1)MISO output capacitive loadMISO (CTRL4) pin50pF
(1) These parameters are not production tested.