JAJSQA1C december   2015  – december 2020 HD3SS214

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings #GUID-AEF84F8B-5035-497D-BF42-BEE5DCF32E24/SLAS9018663 #GUID-AEF84F8B-5035-497D-BF42-BEE5DCF32E24/SLAS9012713
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Electrical Characteristics, Device Parameters
    7. 6.7 Timing Requirements
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 High Speed Switching
      2. 7.3.2 HPD, AUX, and DDC Switching
      3. 7.3.3 Output Enable and Power Savings
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Dual GPU With Docking Station Support
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1 DP Inputs
        2. 8.2.3.2 Source Selection Interface
      4. 8.2.4 DP++ Support
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Detailed Design Procedure
          1. 8.2.4.2.1 AUX and DDC Switching
          2. 8.2.4.2.2 CONFIG1 and CONFIG2 Routing
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Layer Stack
      2. 10.1.2 Differential Traces
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Device Support
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
IIHInput High Current (Dx_SEL, AUX_SEL)VDD = 3.6 V, VIN = VDD1µA
IIMInput Mid Current (AUX_SEL)VDD = 3.6 V, VIN = VDD/21µA
IILInput Low Current (Dx_SEL, AUX_SEL)VDD = 3.6 V, VIN =GND1µA
ILKGLeakage Current (Dx_SEL, AUX_SEL)VDD = 3.3 V, VIN = 2 V, OE = 3.3 V1µA
Leakage Current (HPDx)VDD = 3.3 V, VIN = 2 V, OE = 3.3 V;
Dx_SEL = 3.3 V		1µA
Leakage Current (HPDx)VDD = 3.3 V, VIN = 2 V, OE = 3.3 V;
Dx_SEL = GND		1µA
IOFFDevice Shut Down CurrentVDD = 3.6 V, OE = GND2.5µA
IDDSupply CurrentVDD = 3.6 V, Dx_SEL/AUX_SEL = VDD/GND0.61mA
DA, DB, DC HIGH SPEED SIGNAL PATH
CONOutputs ON CapacitanceVIN = 0 V, Outputs Open, Switch ON0.6pF
COFFOutputs OFF CapacitanceVIN = 0 V, Outputs Open, Switch OFF0.8pF
RONON resistanceVDD = 3.3 V, VCM = 0.5 V – 1.5 V, IO = -40 mA812Ω
ΔRONOn resistance match between pairs of the same channelVDD = 3.3 V, VCM = 0.5 V ≤ VIN ≤ 1.2 V,
IO = -40 mA		1.5Ω
R(FLAT_ON)On resistance flatness
(RON(MAX) – RON(MAIN)		VDD = 3.3 V, VCM = 0.5 V ≤ VIN ≤ 1.2 V1.3Ω
AUXX, DDC, SIGNAL PATH
RON(AUX)ON resistance on AUX channelVDD = 3.3 V, VCM = 0 V – VDD, IO = -8 mA610Ω
RON(DDC)ON resistance on DDC channelVDD = 3.3 V, VCM = 0.4 V, IO = -3 mA2030Ω