JAJSJQ2C june 2021 – march 2023 HDC3020-Q1 , HDC3021-Q1 , HDC3022-Q1
PRODUCTION DATA
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Error checking of data is supported with a Checksum Calculation. The 8-bit CRC checksum transmitted after each data word is generated by a CRC algorithm. Table 8-1 shows the CRC properties. The CRC covers the contents of the two previously transmitted data bytes. To calculate the checksum, only these two previously transmitted data bytes are used.
A CRC byte is sent by the HDC302x-Q1 to the I2C controller in the following cases:
A CRC byte must be sent by the I2C controller to the HDC302x-Q1 in the following cases:
PROPERTY | VALUE |
---|---|
Name | CRC-8/NRSC-5 |
Width | 8 bit |
Protected Data | Read Data, Write Data, or Both |
Polynomial | 0x31 (x8 + x5 + x4 + 1) |
Initialization | 0xFF |
Reflect Input | False |
Reflect Output | False |
Final XOR | 0x00 |
Examples | CRC of 0xABCD = 0x6F |
Retrieving the CRC byte from the HDC302x-Q1 is optional. A NACK can be issued by the I2C controller prior to reception of the CRC byte to cancel, as shown in Figure 8-1 and Figure 8-2.