JAJSJQ2C june 2021 – march 2023 HDC3020-Q1 , HDC3021-Q1 , HDC3022-Q1
PRODUCTION DATA
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
The HDC302x-Q1 heater architecture is comprised of 14 resistors in parallel, allowing support of several different power levels. The intent of this resistor array is to configure the appropriate heater current for offset error correction or condensation prevention/removal based on the ambient temperature and supply voltage. The heater array is represented by HEATER_CONFIG[15:0], which is defined as:
HEATER_CONFIG[15:0] = 0b00H13H12H11H10H9H8H7H6H5H4H3H2H1H0, where each HX bit represents the configuration of Heater #X of 14. The table below provides a partial list of heater configuration options.
DESIRED HEATER CONFIGURATION | REQUIRED HEATER_CONFIG[15:0][HEX] | CRC |
---|---|---|
ENABLE HEATER full power | 3F FF | 06 |
ENABLE HEATER half power | 03 FF | 00 |
ENABLE HEATER quarter power | 00 9F | 96 |