SBOS508A December 2009 – December 2015 INA129-EP
PRODUCTION DATA.
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
8.1 Application Information
The INA129-EP device measures small differential voltage with high common-mode voltage developed between the non-inverting and inverting input. The high-input voltage protection circuit in conjunction with high input impedance make the INA129-EP suitable for a wide range of applications. The ability to set the reference pin to adjust the functionality of the output signal offers additional flexibility that is practical for multiple configurations.
8.2 Typical Application
Figure 16 shows the basic connections required for operation of the INA129-EP. Applications with noisy or high impedance power supplies may require decoupling capacitors close to the device pins as shown.
The output is referred to the output reference (Ref) terminal which is normally grounded. This must be a low-impedance connection to assure good common-mode rejection. A resistance of 8 Ω in series with the Ref pin will cause a typical device to degrade to approximately 80 dB CMR (G = 1).
Figure 16. Basic Connections
8.2.1 Design Requirements
The device can be configured to monitor the input differential voltage when the gain of the input signal is set by the external resistor RG. The output signal references to the REF pin. The most common application is where the output is referenced to ground when no input signal is present by connecting the REF pin to ground, as Figure 16 shows. When the input signal increases, the output voltage at the OUT pin increases, too.
8.2.2 Detailed Design Procedure
8.2.2.1 Setting the Gain
Gain is set by connecting a single external resistor, RG, between pins 1 and 8.
Commonly used gains and resistor values are shown in Figure 16.
The 49.9-kΩ term in Equation 1 comes from the sum of the two internal feedback resistors of A1 and A2. These on-chip metal film resistors are laser trimmed to accurate absolute values. The accuracy and temperature coefficient of these internal resistors are included in the gain accuracy and drift specifications of the INA129-EP.
The stability and temperature drift of the external gain setting resistor, RG, also affects gain. RG’s contribution to gain accuracy and drift can be directly inferred from Equation 1. Low resistor values required for high gain can make wiring resistance important. Sockets add to the wiring resistance which will contribute additional gain error (possibly an unstable gain error) in gains of approximately 100 or greater.
8.2.2.2 Dynamic Performance
Figure 1 shows that, despite its low quiescent current, the INA129-EP achieves wide bandwidth, even at high gain. This is due to the current-feedback topology of the input stage circuitry. Settling time also remains excellent at high gain.
8.2.2.3 Offset Trimming
The INA129-EP is laser trimmed for low offset voltage and offset voltage drift. Most applications require no external offset adjustment. Figure 17 shows an optional circuit for trimming the output offset voltage. The voltage applied to Ref terminal is summed with the output. The operational amplifier buffer provides low impedance at the Ref terminal to preserve good common-mode rejection.
Figure 17. Optional Trimming of Output Offset Voltage
8.2.2.4 Input Bias Current Return Path
The input impedance of the INA129-EP is extremely high (approximately 1010 Ω). However, a path must be provided for the input bias current of both inputs. This input bias current is approximately ±2 nA. High input impedance means that this input bias current changes very little with varying input voltage.
Input circuitry must provide a path for this input bias current for proper operation. Figure 18 shows various provisions for an input bias current path. Without a bias current path, the inputs will float to a potential which exceeds the common-mode range, and the input amplifiers will saturate.
If the differential source resistance is low, the bias current return path can be connected to one input (see the thermocouple example in Figure 18). With higher source impedance, using two equal resistors provides a balanced input with possible advantages of lower input offset voltage due to bias current and better high-frequency common-mode rejection.
Figure 18. Providing an Input Common-Mode Current Path
8.2.3 Application Curves
| G = 1, 10 | ||
| G = 1, 10 | ||
| G = 100, 1000 | ||
| G = 100, 1000 | ||