JAJSOF3A
May 2023 – September 2023
INA700
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements (I2C)
6.7
Timing Diagram
6.8
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Integrated Shunt Resistor
7.3.2
Safe Operating Area
7.3.3
Versatile Measurement Capability
7.3.4
Internal Measurement and Calculation Engine
7.3.5
High-Precision Delta-Sigma ADC
7.3.5.1
Low Latency Digital Filter
7.3.5.2
Flexible Conversion Times and Averaging
7.3.6
Integrated Precision Oscillator
7.3.7
Multi-Alert Monitoring and Fault Detection
7.4
Device Functional Modes
7.4.1
Shutdown Mode
7.4.2
Power-On Reset
7.5
Programming
7.5.1
I2C Serial Interface
7.5.1.1
Writing to and Reading Through the I2C Serial Interface
7.5.1.2
High-Speed I2C Mode
7.5.1.3
SMBus Alert Response
7.6
Register Maps
7.6.1
INA700 Registers
8
Application and Implementation
8.1
Application Information
8.1.1
Device Measurement Range and Resolution
8.1.2
ADC Output Data Rate and Noise Performance
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Configure the Device
8.2.2.2
Set Desired Fault Thresholds
8.2.2.3
Calculate Returned Values
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
ドキュメントの更新通知を受け取る方法
11.3
サポート・リソース
11.4
Trademarks
11.5
静電気放電に関する注意事項
11.6
用語集
12
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
YWF|8
MXCC018
サーマルパッド・メカニカル・データ
発注情報
jajsof3a_oa
6.7
Timing Diagram
Figure 6-1
I
2
C Timing Diagram