JAJSON8A July 2023 – December 2023 INA745A , INA745B
PRODMIX
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
INPUT | |||||||
CMRR | Common-mode rejection | –0.1 V < VCM < 40 V, TA = –40°C to +125°C |
A devices | ±25 | ±125 | µA/V | |
B devices | ±0.5 | ±1.25 | mA/V | ||||
Ios | Input offset current | TCT > 280 µs | A devices | ±0.9 | ±6.25 | mA | |
B devices | ±7.5 | ±62.5 | mA | ||||
dVos/dT | Input offset current drift | TA = –40°C to +125°C | ±5 | ±30 | µA/°C | ||
PSRR | Input offset current vs power supply | VS = 2.7 V to 5.5 V, TA = –40°C to +125°C | ±0.1 | ±4 | mA/V | ||
Vos_bus | VBUS offset voltage | VBUS = 20 mV | ±2 | ±5 | mV | ||
dVos/dT | VBUS offset voltage drift | TA = –40°C to +125°C | A devices | ±8 | ±40 | µV/°C | |
B devices | ±20 | ±100 | µV/°C | ||||
PSRR | VBUS offset voltage vs power supply | VS = 2.7 V to 5.5 V | ±1.1 | ±4 | mV/V | ||
DC ACCURACY | |||||||
GSERR | System current sense gain error | ISENSE = –25A to +25 A, VCM = 12 V | A devices | ±0.1 | ±0.75 | % | |
GSERR | System current sense gain error | ISENSE = –25A to +25 A, VCM = 12 V | B devices | ±0.1 | ±1.25 | % | |
GS_DRFT | System current sense gain error drift | –40°C ≤ TA ≤ 125°C | A devices | ±25 | ppm/°C | ||
B devices | ±75 | ppm/°C | |||||
GBERR | VBUS voltage gain error | VBUS = 0 V to 40 V | A devices | ±0.01 | ±0.1 | % | |
VBUS = 0 V to 40 V, –40°C ≤ TA ≤ 125°C |
±0.01 | ±0.35 | % | ||||
VBUS = 0 V to 40 V | B devices | ±0.01 | ±0.3 | % | |||
VBUS = 0 V to 40 V, –40°C ≤ TA ≤ 125°C |
±0.01 | ±0.8 | % | ||||
GB_DRFT | VBUS voltage gain error drift | –40°C ≤ TA ≤ 125°C | A devices | ±25 | ppm/°C | ||
B devices | ±50 | ppm/°C | |||||
ZBUS | VBUS pin input impedance | Device enabled with active conversions | 1 | MΩ | |||
PTME | Power total measurement error (TME) | TA = 25°C, at full scale | A devices | ±0.9 | % | ||
B devices | ±1.6 | % | |||||
ETME | Energy and charge TME | TA = 25°C, at full scale power | A devices | ±1.4 | % | ||
B devices | ±2.1 | % | |||||
ADC resolution | 16 | Bits | |||||
1 LSB step size | Current | 1.2 | mA | ||||
Bus voltage | 3.125 | mV | |||||
Temperature | 125 | m°C | |||||
Power | 240 | µW | |||||
Energy | 3.84 | mJ | |||||
Charge | 75 | µC | |||||
TCT | ADC conversion-time(1) | Conversion time field = 0h | 50 | µs | |||
Conversion time field = 1h | 84 | ||||||
Conversion time field = 2h | 150 | ||||||
Conversion time field = 3h | 280 | ||||||
Conversion time field = 4h | 540 | ||||||
Conversion time field = 5h | 1052 | ||||||
Conversion time field = 6h | 2074 | ||||||
Conversion time field = 7h | 4120 | ||||||
INL | Integral Non-Linearity | Bus voltage measurement | ±2 | m% | |||
DNL | Differential Non-Linearity | Bus voltage measurement | 0.2 | LSB | |||
CLOCK SOURCE | |||||||
FOSC | Internal oscillator frequency | 1 | MHz | ||||
OSCTOL | Internal oscillator frequency tolerance | TA = 25°C | ±0.5 | % | |||
TA = –40°C to +125°C | ±1 | % | |||||
TEMPERATURE SENSOR | |||||||
Measurement range | –40 | +150 | °C | ||||
Temperature accuracy | TA = 25°C | ±0.15 | ±1.5 | °C | |||
TA= –40°C to +125°C | ±0.2 | ±2.5 | °C | ||||
INTEGRATED SHUNT | |||||||
Internal kelvin resistance | SH+ to SH–, TA = 25°C | 800 | µΩ | ||||
Pin to pin package resistance | IS+ to IS–, TA = 25°C | 800 | 1000 | 1300 | µΩ | ||
Maximum continuous current | –40°C ≤ TA ≤ 125°C | ±25 | A | ||||
Short time overload change(2) | ISENSE = 50 A for 5 seconds | ±0.003 | % | ||||
Change due to temperature cycling | –65°C ≤ TA ≤ 150°C, 500 cycles | ±0.05 | % | ||||
Resistance change to solder heat | 260°C solder, 10 s | ±0.1 | % | ||||
High temperature exposure change | 1000 hours, TA = 150°C | ±0.015 | % | ||||
POWER SUPPLY | |||||||
VS | Supply voltage | 2.7 | 5.5 | V | |||
VPOR | POR Voltage Level | Supply rising | 1.26 | V | |||
IQ | Quiescent current | ISENSE = 0 V | 640 | 750 | µA | ||
ISENSE = 0 V, TA = –40°C to +125°C | 1 | mA | |||||
IQSD | Quiescent current, shutdown | Shutdown mode | 2.8 | 5 | µA | ||
TPOR | Device start-up time | Power-up (NPOR) | 300 | µs | |||
From shutdown mode | 60 | ||||||
DIGITAL INPUT / OUTPUT | |||||||
VIH | Logic input level, high | SDA, SCL | 1.2 | 5.5 | V | ||
VIL | Logic input level, low | GND | 0.4 | V | |||
VOL | Logic output level, low | IOL = 3 mA | GND | 0.4 | V | ||
IIO_LEAK | Digital leakage input current | 0 ≤ VIN ≤ VS | –1 | 1 | µA |