JAJSDR5A August   2017  – January 2018 INA828

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      INA828の簡略化された内部回路図
      2.      入力オフセット電圧ドリフトの代表的な分布
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Setting the Gain
        1. 7.3.1.1 Gain Drift
      2. 7.3.2 EMI Rejection
        1. Table 2. INA828 EMIRR for Frequencies of Interest
      3. 7.3.3 Input Common-Mode Range
      4. 7.3.4 Input Protection
      5. 7.3.5 Operating Voltage
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Reference Terminal
    2. 8.2 Input Bias Current Return Path
    3. 8.3 PCB Assembly Effects on Precision
    4. 8.4 Typical Application
      1. 8.4.1 Design Requirements
      2. 8.4.2 Detailed Design Procedure
      3. 8.4.3 Application Curves
    5. 8.5 Other Application Examples
      1. 8.5.1 Resistance Temperature Detector Interface
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
      1. 11.1.1 関連資料
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.6 Typical Characteristics

At TA = 25°C, VS = ±15 V, RL = 10 kΩ, VREF = 0 V, and G = 1 (unless otherwise noted)
INA828 C101_SBOS792.png
N = 1886 Mean = 4.73 µV
Std. Dev. = 13.98 µV
Figure 1. Typical Distribution of Input Offset Voltage
INA828 C103_SBOS792.png
N = 1886 Mean = –8.71 µV
Std. Dev. = 48.57 µV
Figure 3. Typical Distribution of Output Offset Voltage
INA828 C131_SBOS792.png
G = 100
88 units, 3 wafer lots
Figure 5. Input-Referred Offset Voltage vs Temperature
INA828 C105_SBOS792.png
N = 1886 Mean = 36.25 pA
Std. Dev. = 65.31 pA
Figure 7. Typical Distribution of Input Bias Current (25°C)
INA828 C106_SBOS792.png
N = 1886 Mean = –52.64 pA
Std. Dev. = 63.86 pA
Figure 9. Typical Distribution of Input Offset Current
INA828 C118_SBOS792.png
Figure 11. Input Offset Current vs Temperature
INA828 C108_SBOS792.png
N = 1886 Mean = 0.01 µV/V
Std. Dev. = 0.1 µV/V
Figure 13. Typical CMRR Distribution (G = 100)
INA828 C122_SBOS792.png
1.
Figure 15. CMRR vs Temperature (G = 100)
INA828 C005_SBOS792.png
Figure 17. CMRR vs Frequency (RTI)
INA828 C003_SBOS792.png
Figure 19. Positive PSRR vs Frequency (RTI)
INA828 C001_SBOS792.png
Figure 21. Gain vs Frequency
INA828 C007_SBOS792.png
Figure 23. Current Noise Spectral Density
vs Frequency (RTI)
INA828 C008b_SBOS792.png
Figure 25. 0.1-Hz to 10-Hz RTI Voltage Noise (G = 1000)
INA828 C116_SBOS792.png
VS = ±15 V
Figure 27. Input Bias Current vs Common-Mode Voltage
INA828 C120_SBOS792.png
Figure 29. Gain Error vs Temperature (G = 100)
INA828 C124_SBOS792.png
Figure 31. Gain Nonlinearity (G = 1)
INA828 C126_SBOS792.png
Figure 33. Offset Voltage vs Negative Common-Mode Voltage
INA828 C128_SBOS792.png
Figure 35. Positive Output Voltage Swing vs Output Current
INA828 C010_SBOS792.png
Figure 37. Large-Signal Frequency Response
INA828 C011_SBOS792.png
Figure 39. Overshoot vs Capacitive Loads
INA828 C013_SBOS792.png
G = 10, RL = 10 kΩ, CL = 100 pF
Figure 41. Small-Signal Response
INA828 C015_SBOS792.png
G = 1000, RL = 10 kΩ, CL = 100 pF
Figure 43. Small-Signal Response
INA828 C016_SBOS792.png
Figure 45. Closed-Loop Output Impedance
INA828 C202_SBOS792.png
Figure 47. Common-Mode EMI Rejection Ratio
INA828 C112_SBOS792.png
VS = 5 V, G = 100
Figure 49. Input Common-Mode Voltage vs Output Voltage
INA828 C111_SBOS792.png
VS = ±15 V, VREF = 0 V
Figure 51. Input Common-Mode Voltage vs Output Voltage
INA828 C102_SBOS792.png
N = 19081 Mean = 0.16 nV/°C
Std. Dev. = 0.09 µV/°C
Figure 2. Typical Distribution of Input Offset Voltage Drift
INA828 C104_SBOS792.png
N = 19081 Mean = –0.73 µV/°C
Std. Dev. = 0.74 µV/°C
Figure 4. Typical Distribution of Output Offset Voltage Drift
INA828 C130_SBOS792.png
G = 1
88 units, 3 wafer lots
Figure 6. Input-Referred Offset Voltage vs Temperature
INA828 C105B_SBOS792.png
N = 19081 Mean = –5.32 pA
Std. Dev. = 57.46 pA
Figure 8. Typical Distribution of Input Bias Current (90°C)
INA828 C117_SBOS792.png
Figure 10. Input Bias Current vs Temperature
INA828 C107_SBOS792.png
N = 1886 Mean = 1.18 µV/V
Std. Dev. = 10.04 µV/V
Figure 12. Typical CMRR Distribution (G = 1)
INA828 C121_SBOS792.png
5 Typical Units
Figure 14. CMRR vs Temperature (G = 1)
INA828 C115_SBOS792.png
Figure 16. Input Current vs Input Overvoltage
INA828 C006_SBOS792.png
Figure 18. CMRR vs Frequency
(RTI, 1-kΩ Source Imbalance)
INA828 C004_SBOS792.png
Figure 20. Negative PSRR vs Frequency (RTI)
INA828 C002_SBOS792.png
Figure 22. Voltage Noise Spectral Density
vs Frequency (RTI)
INA828 C008_SBOS792.png
Figure 24. 0.1-Hz to 10-Hz RTI Voltage Noise (G = 1)
INA828 C009_SBOS792.png
Figure 26. 0.1-Hz to 10-Hz RTI Current Noise
INA828 C119_SBOS792.png
Figure 28. Gain Error vs Temperature (G = 1)
INA828 C123_SBOS792.png
Figure 30. Supply Current vs Temperature
INA828 C125_SBOS792.png
Figure 32. Gain Nonlinearity (G = 100)
INA828 C127_SBOS792.png
Figure 34. Offset Voltage vs Positive Common-Mode Voltage
INA828 C129_SBOS792.png
Figure 36. Negative Output Voltage Swing vs Output Current
INA828 C017_SBOS792.png
500-kHz Measurement bandwidth 1-VRMS Output voltage
100-kΩ Load
Figure 38. THD+N vs Frequency
INA828 C012_SBOS792.png
G = 1, RL = 10 kΩ, CL = 100 pF
Figure 40. Small-Signal Response
INA828 C014_SBOS792.png
G = 100, RL = 10 kΩ, CL = 100 pF
Figure 42. Small-Signal Response
INA828 C018_SBOS792.png
Figure 44. Large Signal Step Response
INA828 C201_SBOS792.png
Figure 46. Differential-Mode EMI Rejection Ratio
INA828 C109_SBOS792.png
VS = 5 V, G = 1
Figure 48. Input Common-Mode Voltage vs Output Voltage
INA828 C110_SBOS792.png
VS = ±5 V, VREF = 0 V
Figure 50. Input Common-Mode Voltage vs Output Voltage