JAJSFH3E December   2017  – October 2019 ISO1042

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     アプリケーション図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions—16 Pins
    2.     Pin Functions—8 Pins
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Transient Immunity
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Thermal Information
    6. 6.6  Power Ratings
    7. 6.7  Insulation Specifications
    8. 6.8  Safety-Related Certifications
    9. 6.9  Safety Limiting Values
    10. 6.10 Electrical Characteristics - DC Specification
    11. 6.11 Switching Characteristics
    12. 6.12 Insulation Characteristics Curves
    13. 6.13 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Test Circuits
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 CAN Bus States
      2. 8.3.2 Digital Inputs and Outputs: TXD (Input) and RXD (Output)
      3. 8.3.3 Protection Features
        1. 8.3.3.1 TXD Dominant Timeout (DTO)
        2. 8.3.3.2 Thermal Shutdown (TSD)
        3. 8.3.3.3 Undervoltage Lockout and Default State
        4. 8.3.3.4 Floating Pins
        5. 8.3.3.5 Unpowered Device
        6. 8.3.3.6 CAN Bus Short Circuit Current Limiting
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Bus Loading, Length and Number of Nodes
        2. 9.2.2.2 CAN Termination
      3. 9.2.3 Application Curve
    3. 9.3 DeviceNet Application
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DWV|8
  • DW|16
サーマルパッド・メカニカル・データ
発注情報

6.10 Electrical Characteristics - DC Specification

Over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CHARACTERISTICS
ICC1 Supply current Side 1 VCC1 =1.71 V to 1.89 V, TXD = 0 V, bus dominant   2.3 3.5 mA
VCC1 = 2.25 V to 5.5 V, TXD = 0 V, bus dominant   2.4 3.5 mA
VCC1 = 1.71 V to 1.89 V, TXD = VCC1, bus recessive   1.2 2.1 mA
VCC1 = 2.25 V to 5.5 V, TXD = VCC1, bus recessive   1.3 2.1 mA
ICC2 Supply current Side 2 TXD = 0 V, bus dominant, RL = 60 Ω   43 73.4 mA
TXD = VCC1, bus recessive, RL = 60 Ω   2.8 4.1 mA
UVVCC1 Rising under voltage detection, Side 1   1.7 V
UVVCC1 Falling under voltage detection, Side 1 1.0   V
VHYS(UVCC1) Hysterisis voltage on VCC1 undervoltage lock-out 75 125   mV
UVVCC2 Rising under voltage detection, side 2   4.2 4.45 V
UVVCC2 Falling under voltage detection, side 2 3.8 4.0 4.25 V
VHYS(UVCC2) Hysterisis voltage on VCC2 undervoltage lock-out   200 mV
TXD TERMINAL
VIH High level input voltage 0.7×VCC1 V
VIL Low level input voltage 0.3×VCC1 V
IIH High level input leakage current TXD = VCC1 1 uA
IIL Low level input leakage current TXD = 0V -20 uA
CI Input capacitance VIN = 0.4 x sin(2 x π x 1E+6 x t) + 2.5 V, VCC1 = 5 V 3 pF
RXD TERMINAL
VOH - VCC1 High level output voltage See Figure 18, IO = -4 mA for 4.5 V ≤ VCC1 ≤ 5.5 V -0.4 -0.2   V
See Figure 18, IO = -2 mA for 3.0 V ≤ VCC1 ≤ 3.6 V -0.2 -0.07   V
See Figure 18, IO = -1 mA for 2.25 V ≤ VCC1 ≤ 2.75 V -0.1 -0.04   V
See Figure 18, IO = -1 mA for 1.71 V ≤ VCC1 ≤ 1.89 V -0.1 -0.045   V
VOL Low level output voltage See Figure 18, IO = 4 mA for 4.5 V ≤ VCC1 ≤ 5.5 V 0.2 0.4 V
See Figure 18, IO = 2 mA for 3.0 V ≤ VCC1 ≤ 3.6 V 0.07 0.2 V
See Figure 18, IO = 1 mA for 2.25 V ≤ VCC1 ≤ 2.75 V 0.035 0.1 V
See Figure 18, IO = 1 mA for 1.71 V ≤ VCC1 ≤ 1.89 V 0.04 0.1 V
DRIVER ELECTRICAL CHARACTERISTICS
VO(DOM) Bus output voltage(Dominant), CANH See Figure 15 and Figure 16, TXD = 0 V, 50 Ω ≤ RL ≤ 65 Ω, CL = open 2.75 4.5 V
Bus output voltage(Dominant), CANL See Figure 15 and Figure 16, TXD = 0 V, 50 Ω ≤ RL ≤ 65 Ω,  CL = open 0.5 2.25 V
VO(REC) Bus output voltage(recessive), CANH and CANL See Figure 15 and Figure 16, TXD = VCC1, RL = open 2.0 0.5 x VCC2 3.0 V
VOD(DOM) Differential output voltage, CANH-CANL (dominant) See Figure 15 and Figure 16, TXD = 0 V, 45 Ω ≤ RL ≤ 50 Ω,  CL = open 1.4 3.0 V
Differential output voltage, CANH-CANL (dominant) See Figure 15 and Figure 16, TXD = 0 V, 50 Ω ≤ RL ≤ 65 Ω,  CL = open 1.5 3.0 V
Differential output voltage, CANH-CANL (dominant) See Figure 15 and Figure 16, TXD = 0 V,  RL = 2240 Ω,  CL = open 1.5 5.0 V
VOD(REC) Differential output voltage, CANH-CANL (recessive) See Figure 15 and Figure 16, TXD = VCC1, RL = 60 Ω,  CL = open -120.0 12.0 mV
Differential output voltage, CANH-CANL (recessive) See Figure 15 and Figure 16, TXD = VCC1, RL = open,  CL = open -50.0 50.0 mV
VSYM_DC DC Output symmetry (VCC2 - VO(CANH) - VO(CANL)) See Figure 15 and Figure 16, RL = 60 Ω, CL = open, TXD = VCC1 or 0 V -400.0 400.0 mV
ISO(SS_DOM) Short circuit current steady state output current, dominant See Figure 23, VCANH = -5 V to 40 V, CANL = open, TXD = 0 V -100.0   mA
See Figure 23, VCANL = -5 V to 40 V, CANH = open, TXD = 0 V   100.0 mA
ISO(SS_REC) Short circuit current steady state output current, recessive See Figure 23, -27 V ≤ VBUS ≤ 32 V, VBUS = CANH = CANL, TXD = VCC1 -5.0 5.0 mA
RECEIVER ELECTRICAL CHARACTERISTICS
VIT Differential input threshold voltage See Figure 18 and Table 1, |VCM| ≤ 20 V 500.0 900.0 mV
Differential input threshold voltage See Figure 18 and Table 1, 20 V ≤ |VCM| ≤ 30 V 400.0 1000.0
VHYS Hysteresis voltage for differential input threshold See Figure 18 and Table 1   120
VCM Input common mode range See Figure 18 and Table 1 -30.0 30.0 V
IOFF(LKG) Power-off bus input leakage current CANH = CANL = 5 V, VCC2 to GND via 0 Ω and 47 kΩ resistor 4.8 uA
CI Input capacitance to ground (CANH or CANL) TXD = VCC1   24.0 30 pF
CID Differential input capacitance (CANH-CANL) TXD = VCC1   12.0 15 pF
RID Differential input resistance TXD = VCC1 ; -30 V ≤ VCM ≤ +30 V 30.0 80.0 kΩ
RIN Input resistance (CANH or CANL) TXD = VCC1 ; -30 V ≤ VCM ≤ +30 V 15.0 40.0 kΩ
RIN(M) Input resistance matching: (1 - RIN(CANH)/RIN(CANL)) x 100% VCANH = VCANL = 5 V -2.0 2.0 %
THERMAL SHUTDOWN
TTSD Thermal shutdown temperature 170 ℃
TTSD_HYST Thermal shutdown hysteresis 5 ℃