JAJSSO9B August   2023  – April 2024 ISO6520 , ISO6521

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Package Characteristics
    6. 5.6  Electrical Characteristics—5-V Supply
    7. 5.7  Supply Current Characteristics—5-V Supply
    8. 5.8  Electrical Characteristics—3.3-V Supply
    9. 5.9  Supply Current Characteristics—3.3-V Supply
    10. 5.10 Electrical Characteristics—2.5-V Supply 
    11. 5.11 Supply Current Characteristics—2.5-V Supply
    12. 5.12 Electrical Characteristics—1.8-V Supply
    13. 5.13 Supply Current Characteristics—1.8-V Supply
    14. 5.14 Switching Characteristics—5-V Supply
    15. 5.15 Switching Characteristics—3.3-V Supply
    16. 5.16 Switching Characteristics—2.5-V Supply
    17. 5.17 Switching Characteristics—1.8-V Supply
    18. 5.18 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device I/O Schematics
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 PCB Material
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.1 Application Information

The ISO652x devices are high-performance, dual-channel digital isolators. The devices use single-ended CMOS-logic switching technology. The supply voltage range is from 1.71 V to 5.5 V for both supplies, VCC1 and VCC2. Since an isolation barrier separates the two sides, each side can be sourced independently with any voltage within the recommended operating conditions. As an example, supplying VCC1 with 3.3 V (which is within 1.71 V to 1.89 V and 2.25 V to 5 V) and VCC2 with 5 V (which is also within 1.71 V to 1.89 V and 2.25 V to 5 V) is possible. The digital isolator can be used as a logic-level translator in addition to providing isolation. When designing with digital isolators, keep in mind that because of the single-ended design structure, digital isolators do not conform to any specific interface standard and are only intended for isolating single-ended CMOS or TTL digital signal lines. The isolator is typically placed between the data controller (that is, MCU or FPGA), and a data converter or a line transceiver, regardless of the interface type or standard.

Note:

ISO652x is a functional isolator, and is not certified for isolation by standard bodies. For applications that require certified isolation by standard bodies, customers must choose ISO672x, ISO772x or ISO782x families of digital isolators.