JAJSSO9B August   2023  – April 2024 ISO6520 , ISO6521

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Package Characteristics
    6. 5.6  Electrical Characteristics—5-V Supply
    7. 5.7  Supply Current Characteristics—5-V Supply
    8. 5.8  Electrical Characteristics—3.3-V Supply
    9. 5.9  Supply Current Characteristics—3.3-V Supply
    10. 5.10 Electrical Characteristics—2.5-V Supply 
    11. 5.11 Supply Current Characteristics—2.5-V Supply
    12. 5.12 Electrical Characteristics—1.8-V Supply
    13. 5.13 Supply Current Characteristics—1.8-V Supply
    14. 5.14 Switching Characteristics—5-V Supply
    15. 5.15 Switching Characteristics—3.3-V Supply
    16. 5.16 Switching Characteristics—2.5-V Supply
    17. 5.17 Switching Characteristics—1.8-V Supply
    18. 5.18 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device I/O Schematics
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 PCB Material
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5.14 Switching Characteristics—5-V Supply

VCC1 = VCC2 = 5 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH, tPHL Propagation delay time See Figure 6-1 11 18 ns
tP(dft) Propagation delay drift 8 ps/℃
tUI Minimum pulse width See Figure 6-1 20 ns
PWD Pulse width distortion(1) |tPHL – tPLH| See Figure 6-1 0.2 7 ns
tsk(o) Channel-to-channel output skew time (2) Same direction channels 6 ns
tsk(p-p) Part-to-part skew time (3) 6 ns
tr Output signal rise time See Figure 6-1 2.6 4.5 ns
tf Output signal fall time 2.6 4.5 ns
tPU Time from UVLO to valid output data 300 μs
tDO Default output delay time from input power loss Measured from the time VCC goes
below 1.2V. See Figure 6-2		 0.1 0.3 μs
tie Time interval error 216 – 1 PRBS data at 50 Mbps 1 ns
(1) Also known as pulse skew.
(2) tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical loads.
(3) tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads.