JAJSL42H January   2020  – May 2022 ISO6720-Q1 , ISO6721-Q1 , ISO6721R-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 概要 (続き)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Ratings
    6.     Insulation Specifications
    7. 7.6  Safety-Related Certifications
    8. 7.7  Safety Limiting Values
    9.     Electrical Characteristics—5-V Supply
    10. 7.8  Supply Current Characteristics—5-V Supply
    11. 7.9  Electrical Characteristics—3.3-V Supply
    12. 7.10 Supply Current Characteristics—3.3-V Supply
    13. 7.11 Electrical Characteristics—2.5-V Supply 
    14. 7.12 Supply Current Characteristics—2.5-V Supply
    15.     Electrical Characteristics—1.8-V Supply
    16. 7.13 Supply Current Characteristics—1.8-V Supply
    17. 7.14 Switching Characteristics—5-V Supply
    18. 7.15 Switching Characteristics—3.3-V Supply
    19. 7.16 Switching Characteristics—2.5-V Supply
    20. 7.17 Switching Characteristics—1.8-V Supply
    21. 7.18 Insulation Characteristics Curves
    22. 7.19 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Electromagnetic Compatibility (EMC) Considerations
    4. 9.4 Device Functional Modes
      1. 9.4.1 Device I/O Schematics
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
    3. 10.3 Insulation Lifetime
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 PCB Material
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Development Support
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 サポート・リソース
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information
    1. 14.1 Package Option Addendum
    2. 14.2 Tape and Reel Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.14 Switching Characteristics—5-V Supply

VCC1 = VCC2 = 5 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH, tPHL Propagation delay time See Figure 8-1 11 18 ns
tP(dft) Propagation delay drift 8 ps/℃
tUI Minimum pulse width See Figure 8-1 20 ns
PWD Pulse width distortion(1) |tPHL – tPLH| See Figure 8-1 0.2 7 ns
tsk(o) Channel-to-channel output skew time (2) Same direction channels 6 ns
tsk(p-p) Part-to-part skew time (3) 6 ns
tr Output signal rise time See Figure 8-1 2.6 4.5 ns
tf Output signal fall time 2.6 4.5 ns
tPU Time from UVLO to valid output data 300 us
tDO Default output delay time from input power loss Measured from the time VCC goes
below 1.2V. See Figure 8-2		 0.1 0.3 us
tie Time interval error 216 – 1 PRBS data at 50 Mbps 1 ns
(1) Also known as pulse skew.
(2) tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical loads.
(3) tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads.