JAJSHO2C
July 2019 – May 2024
ISO7021
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Device Comparison Table
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Power Ratings
6.6
Insulation Specifications
6.7
Safety-Related Certifications
6.8
Safety Limiting Values
6.9
Electrical Characteristics 5V Supply
6.10
Supply Current Characteristics 5V Supply
6.11
Electrical Characteristics 3.3V Supply
6.12
Supply Current Characteristics 3.3V Supply
6.13
Electrical Characteristics 2.5V Supply
6.14
Supply Current Characteristics 2.5V Supply
6.15
Electrical Characteristics 1.8V Supply
6.16
Supply Current Characteristics 1.8V Supply
6.17
Switching Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Refresh
8.3.2
Electromagnetic Compatibility (EMC) Considerations
8.4
Device Functional Modes
8.4.1
Device I/O Schematics
9
Application and Implementation
9.1
Application Information
9.1.1
Insulation Lifetime
9.1.2
Intrinsic Safety
9.1.2.1
Schedule of Limitations
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.1.1
PCB Material
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Receiving Notification of Documentation Updates
12.3
サポート・リソース
12.4
Trademarks
12.5
静電気放電に関する注意事項
12.6
用語集
13
Revision History
14
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
D|8
MSOI002K
サーマルパッド・メカニカル・データ
発注情報
jajsho2c_oa
jajsho2c_pm
8.2
Functional Block Diagram
Figure 8-1
Conceptual Block Diagram of a Digital Capacitive Isolator
Figure 8-2
Conceptual Block Diagram of a Digital Capacitive Isolator