JAJSLN1
June 2022
ISO7041-Q1
PRODUCTION DATA
1
特長
2
アプリケーション
3
説明
4
Revision History
Device Comparison Table
5
Pin Configuration and Functions
6
Specifications
6.1
絶対最大定格
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Power Ratings
Insulation Specifications
6.6
Safety-Related Certifications
6.7
Safety Limiting Values
6.8
Electrical Characteristics 5V Supply
6.9
Supply Current Characteristics 5V Supply
6.10
Electrical Characteristics 3.3V Supply
6.11
Supply Current Characteristics 3.3V Supply
6.12
Switching Characteristics
6.13
Insulation Characteristics Curves
6.14
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Refresh
8.3.2
Electromagnetic Compatibility (EMC) Considerations
8.4
Device Functional Modes
8.4.1
Device I/O Schematics
9
Application and Implementation
9.1
Application Information
9.1.1
Insulation Lifetime
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.1.1
PCB Material
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Receiving Notification of Documentation Updates
12.3
サポート・リソース
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DBQ|16
MSOI004H
サーマルパッド・メカニカル・データ
発注情報
jajsln1_oa
8.2
Functional Block Diagram
Figure 8-1
Conceptual Block Diagram of a Digital Capacitive Isolator