SLLSE83F April   2013  – January 2015 ISO7131CC , ISO7140CC , ISO7140FCC , ISO7141CC , ISO7141FCC

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Dissipation Ratings
    6. 6.6  Electrical Characteristics: VCC1 and VCC2 at 5 V ±10%
    7. 6.7  Electrical Characteristics: VCC1 and VCC2 at 3.3 V ±10%
    8. 6.8  Electrical Characteristics: VCC1 and VCC2 at 2.7 V
    9. 6.9  Switching Characteristics: VCC1 and VCC2 at 5 V ±10%
    10. 6.10 Switching Characteristics: VCC1 and VCC2 at 3.3 V ±10%
    11. 6.11 Switching Characteristics: VCC1 and VCC2 at 2.7 V
    12. 6.12 Supply Current: VCC1 and VCC2 at 5 V ±10%
    13. 6.13 Supply Current: VCC1 and VCC2 at 3.3 V ±10%
    14. 6.14 Supply Current: VCC1 and VCC2 at 2.7 V
    15. 6.15 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Insulation and Safety-Related Specifications
        1. 8.3.1.1 Safety Limiting Values
        2. 8.3.1.2 Regulatory Information
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Isolated Data Acquisition System for Process Control
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Isolated RS-485 Interface
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

ISO71xx use single-ended TTL-logic switching technology. Its supply voltage range is from 3 V to 5.5 V for both supplies, VCC1 and VCC2. When designing with digital isolators, it is important to note that due to the single-ended design structure, digital isolators do not conform to any specific interface standard and are only intended for isolating single-ended CMOS or TTL digital signal lines. The isolator is typically placed between the data controller (that is, μC or UART), and a data converter or a line transceiver, regardless of the interface type or standard.

9.2 Typical Applications

9.2.1 Isolated Data Acquisition System for Process Control

ISO71xx combined with TI's precision analog-to-digital converter and mixed signal micro-controller can create an advanced isolated data acquisition system as shown in Figure 17.

Apps_Circuits1_sllsei6.gifFigure 17. Isolated Data Acquisition System for Process Control

9.2.1.1 Design Requirements

Unlike optocouplers, which need external components to improve performance, provide bias, or limit current, ISO71xx only needs two external bypass capacitors to operate.

9.2.1.2 Detailed Design Procedure

ddp1_sllse83.gifFigure 18. Typical ISO7131 Circuit Hook-up
ddp3_sllse83.gifFigure 20. Typical ISO7141 Circuit Hook-up
ddp2_sllse83.gifFigure 19. Typical ISO7140 Circuit Hook-up

9.2.1.3 Application Curves

Typical eye diagrams of ISO71xx (see Figure 21, Figure 22, and Figure 23) indicate low jitter and wide open eye at the maximum data rate.

typ_eye_at_40_Mbps_2_llse83.gifFigure 21. Typical Eye Diagram at 40 MBPS, PRBS 216 - 1, 2.7-V Operation
typ_eye_at_50_Mbps_5_llse83.gifFigure 23. Typical Eye Diagram at 50 MBPS, PRBS 216 - 1, 5-V Operation
typ_eye_at_40_Mbps_3_llse83.gifFigure 22. Typical Eye Diagram at 40 MBPS, PRBS 216 - 1, 3.3-V Operation

9.2.2 Isolated RS-485 Interface

typappcircuit1_sllse83.gifFigure 24. Isolated RS-485 Interface

9.2.2.1 Design Requirements

See previous Design Requirements.

9.2.2.2 Detailed Design Procedure

See previous Detailed Design Procedure.

9.2.2.3 Application Curves

See previous Application Curves.