JAJS331R July   2006  – October 2024 ISO7220A , ISO7220B , ISO7220C , ISO7220M , ISO7221A , ISO7221B , ISO7221C , ISO7221M

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Ratings
    6. 5.6  Insulation Specifications
    7. 5.7  Safety-Related Certifications
    8. 5.8  Safety Limiting Values
    9. 5.9  Electrical Characteristics—5-V VCC1 and VCC2 Supplies
    10. 5.10 Electrical Characteristics—5-V VCC1 and 3.3-V VCC2 Supply
    11. 5.11 Electrical Characteristics—3.3-V VCC1 and 5-V VCC2 Supply
    12. 5.12 Electrical Characteristics—3.3-V VCC1 and VCC2 Supplies
    13. 5.13 Electrical Characteristics—2.8-V VCC1 and VCC2 Supplies
    14. 5.14 Switching Characteristics—5-V VCC1 and VCC2 Supplies
    15. 5.15 Switching Characteristics—5-V VCC1 and 3.3-V VCC2 Supply
    16. 5.16 Switching Characteristics—3.3-VCC1 and 5-V VCC2 Supplies
    17. 5.17 Switching Characteristics—3.3-V VCC1 and VCC2 Supplies
    18. 5.18 Switching Characteristics—2.8-V VCC1 and VCC2 Supplies
    19. 5.19 Insulation Characteristics Curves
    20. 5.20 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Insulation Lifetime
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 PCB Material
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Related Links
    4. 9.4 ドキュメントの更新通知を受け取る方法
    5. 9.5 サポート・リソース
    6. 9.6 Trademarks
    7. 9.7 静電気放電に関する注意事項
    8. 9.8 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5.14 Switching Characteristics—5-V VCC1 and VCC2 Supplies

VCC1 and VCC2 at 5 V ± 10% (over recommended operating conditions unless otherwise noted.)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH, tPHL Propagation delay ISO722xA, see Figure 6-1 252 405 600 ns
PWD Pulse-width distortion |tPHL – tPLH|(1) 1 18 ns
tPLH, tPHL Propagation delay ISO722xB, see Figure 6-1 35 55 70 ns
PWD Pulse-width distortion |tPHL – tPLH|(1) 1 3 ns
tPLH, tPHL Propagation delay ISO722xC, see Figure 6-1 21 32 42 ns
PWD Pulse-width distortion |tPHL – tPLH|(1) 1 2 ns
tPLH, tPHL Propagation delay ISO722xM, see Figure 6-1 6 10 16 ns
PWD Pulse-width distortion |tPHL – tPLH|(1) 0.5 1 ns
tsk(pp) Part-to-part skew (2) ISO722xA 180 ns
ISO722xB 17
ISO722xC 10
ISO722xM 3
tsk(o) Channel-to-channel output skew (3) ISO7220A 3 15 ns
ISO7220B 0.6 3
ISO7220C 2
ISO7220M 0.2 1
tr Output signal rise time See Figure 6-1 2.3 ns
tf Output signal fall time 2.3 ns
tfs Failsafe output delay time from input power loss See Figure 6-2 3 μs
tjit(pp) Peak-to-peak eye-pattern jitter ISO722xM, 150 Mbps PRBS NRZ data, 5-bit max same polarity input, both channels, See Figure 6-4, Figure 5-13 1 ns
ISO722xM, 150 Mbps unrestricted bit run length data input, both channels, See Figure 6-4 2
(1) Also referred to as pulse skew.
(2) tsk(pp) is the magnitude of the difference in propagation delay times between any specified pins of two devices when both devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits.
(3) tsk(o) is the skew between specified outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical specified loads.