JAJS275U September   2007  – October 2024 ISO7240C , ISO7240CF , ISO7240M , ISO7241C , ISO7241M , ISO7242C , ISO7242M

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configurations and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Ratings
    6. 5.6  Insulation Specifications
    7. 5.7  Safety-Related Certifications
    8. 5.8  Safety Limiting Values
    9. 5.9  Electrical Characteristics: VCC1 and VCC2 at 5-V Operation
    10. 5.10 Supply Current Characteristics: VCC1 and VCC2 at 5-V Operation
    11. 5.11 Electrical Characteristics: VCC1 at 5-V, VCC2 at 3.3-V Operation
    12. 5.12 Supply Current Characteristics: VCC1 at 5-V, VCC2 at 3.3-V Operation
    13. 5.13 Electrical Characteristics: VCC1 at 3.3-V, VCC2 at 5-V Operation
    14. 5.14 Supply Current Characteristics: VCC1 at 3.3-V, VCC2 at 5-V Operation
    15. 5.15 Electrical Characteristics: VCC1 and VCC2 at 3.3 V Operation
    16. 5.16 Supply Current Characteristics: VCC1 and VCC2 at 3.3 V Operation
    17. 5.17 Switching Characteristics: VCC1 and VCC2 at 5-V Operation
    18. 5.18 Switching Characteristics: VCC1 at 5-V, VCC2 at 3.3-V Operation
    19. 5.19 Switching Characteristics: VCC1 at 3.3-V and VCC2 at 5-V Operation
    20. 5.20 Switching Characteristics: VCC1 and VCC2 at 3.3-V Operation
    21. 5.21 Insulation Characteristics Curves
    22. 5.22 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device I/O Schematics
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Isolated Data Acquisition System for Process Control
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Isolated SPI for an Analog Input Module with 16 Inputs
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
      3. 8.2.3 Isolated RS-232 Interface
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 PCB Material
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Related Links
    3. 9.3 ドキュメントの更新通知を受け取る方法
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 静電気放電に関する注意事項
    7. 9.7 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5.13 Electrical Characteristics: VCC1 at 3.3-V, VCC2 at 5-V Operation

For the 5-V operation, VCC1 or VCC2 is specified from 4.5 V to 5.5 V. For the 3.3-V operation, VCC1 or VCC2 is specified from 3.15 V to 3.6 V. Over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IOFF Sleep mode output current EN at 0 V, Single channel 0 μA
VOH High-level output voltage IOH = –4 mA, See Figure 6-1 3.3-V side VCCO – 0.4 V
5-V side VCCO – 0.8
IOH = –20 μA, See Figure 6-1 VCCO – 0.1
VOL Low-level output voltage IOL = 4 mA, See Figure 6-1 0.4 V
IOL = 20 μA, See Figure 6-1 0.1
VI(HYS) Input voltage hysteresis 150 mV
IIH High-level input current IN at VCCI 10 μA
IIL Low-level input current IN at 0 V –10
CI Input capacitance to ground IN at VCC, VI = 0.4 sin (2πft), f=2MHz 2 pF
CMTI Common-mode transient immunity VI = VCC or 0 V, See Figure 6-5 25 50 kV/μs