SLLSEN2B July   2015  – April 2016 ISO7840

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics—5-V Supply
    10. 6.10 Supply Characteristics—5-V Supply
    11. 6.11 Electrical Characteristics—3.3-V Supply
    12. 6.12 Supply Current Characteristics—3.3-V Supply
    13. 6.13 Electrical Characteristics—2.5-V Supply
    14. 6.14 Supply Current Characteristics—2.5-V Supply
    15. 6.15 Switching Characteristics—5-V Supply
    16. 6.16 Switching Characteristics—3.3-V Supply
    17. 6.17 Switching Characteristics—2.5-V Supply
    18. 6.18 Insulation Characteristics Curves
    19. 6.19 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Electromagnetic Compatibility (EMC) Considerations
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device I/O Schematics
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DWW|16
  • DW|16
サーマルパッド・メカニカル・データ
発注情報

8 Detailed Description

8.1 Overview

The ISO7840 device uses an ON-OFF keying (OOK) modulation scheme to transmit the digital data across a silicon-dioxide based isolation barrier. The transmitter sends a high-frequency carrier across the barrier to represent one digital state and sends no signal to represent the other digital state. The receiver demodulates the signal after advanced signal conditioning and produces the output through a buffer stage. If the EN pin is low then the output goes to high impedance. The ISO7840 device also incorporates advanced circuit techniques to maximize the CMTI performance and minimize the radiated emissions because of the high-frequency carrier and IO buffer switching. The conceptual block diagram of a digital capacitive isolator, Figure 15, shows a functional block diagram of a typical channel.

8.2 Functional Block Diagram

ISO7840 ISO7840F fbd_sllsej0.gif Figure 15. Conceptual Block Diagram of a Digital Capacitive Isolator

Figure 16 shows a conceptual detail of how the ON-OFF keying scheme works.

ISO7840 ISO7840F on_off_keying_sllsej0.gif Figure 16. On-Off Keying (OOK) Based Modulation Scheme

8.3 Feature Description

Table 1 lists the device features.

Table 1. Device Features

PART NUMBER CHANNEL DIRECTION RATED ISOLATION MAXIMUM DATA RATE DEFAULT OUTPUT
ISO7840 4 Forward,
5700 VRMS / 8000 VPK (1) 100 Mbps High
0 Reverse
ISO7840F 4 Forward,
5700 VRMS / 8000 VPK (1) 100 Mbps Low
0 Reverse
(1) See for detailed isolation ratings.

8.3.1 Electromagnetic Compatibility (EMC) Considerations

Many applications in harsh industrial environment are sensitive to disturbances such as electrostatic discharge (ESD), electrical fast transient (EFT), surge, and electromagnetic emissions. These electromagnetic disturbances are regulated by international standards such as IEC 61000-4-x and CISPR 22. Although system-level performance and reliability depends, to a large extent, on the application board design and layout, the ISO7840 device incorporates many chip-level design improvements for overall system robustness. Some of these improvements include

  • Robust ESD protection cells for input and output signal pins and inter-chip bond pads.
  • Low-resistance connectivity of ESD cells to supply and ground pins.
  • Enhanced performance of high voltage isolation capacitor for better tolerance of ESD, EFT and surge events.
  • Bigger on-chip decoupling capacitors to bypass undesirable high energy signals through a low impedance path.
  • PMOS and NMOS devices isolated from each other by using guard rings to avoid triggering of parasitic SCRs.
  • Reduced common mode currents across the isolation barrier by ensuring purely differential internal operation.

8.4 Device Functional Modes

Table 2 lists the ISO7840 functional modes.

Table 2. Function Table(1)

VCCI VCCO INPUT
(INx)(3)		 OUTPUT ENABLE
(EN2)		 OUTPUT
(OUTx)		 COMMENTS
PU PU H H or open H Normal Operation:
A channel output assumes the logic state of its input.
L H or open L
Open H or open Default Default mode: When INx is open, the corresponding channel output goes to its default logic state. Default= High for ISO7840 and Low for ISO7840F.
X PU X L Z A low value of Output Enable causes the outputs to be high-impedance
PD PU X H or open Default Default mode: When VCCI is unpowered, a channel output assumes the logic state based on the selected default option. Default= High for IISO7840 and Low for ISO7840F.
When VCCI transitions from unpowered to powered-up, a channel output assumes the logic state of its input.
When VCCI transitions from powered-up to unpowered, channel output assumes the selected default state.
X PD X X Undetermined When VCCO is unpowered, a channel output is undetermined (2).
When VCCO transitions from unpowered to powered-up, a channel output assumes the logic state of its input
(1) VCCI = Input-side VCC; VCCO = Output-side VCC; PU = Powered up (VCC ≥ 2.25 V); PD = Powered down (VCC ≤ 1.7 V); X = Irrelevant; H = High level; L = Low level ; Z = High Impedance
(2) The outputs are in undetermined state when 1.7 V < VCCI, VCCO < 2.25 V.
(3) A strongly driven input signal can weakly power the floating VCC through an internal protection diode and cause undetermined output.

8.4.1 Device I/O Schematics

ISO7840 ISO7840F device_IO_sllen2.gif Figure 17. Device I/O Schematics