JAJSUF8A April   2024  – July 2024 ISOM8110-Q1 , ISOM8111-Q1 , ISOM8112-Q1 , ISOM8113-Q1 , ISOM8115-Q1 , ISOM8116-Q1 , ISOM8117-Q1 , ISOM8118-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions 
    4. 6.4  Thermal Information 
    5. 6.5  Insulation Specifications
    6. 6.6  Safety-Related Certifications
    7. 6.7  Safety Limiting Values
    8. 6.8  Electrical Characteristics
    9. 6.9  Switching Characteristics
    10. 6.10 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Typical Application
        1. 9.1.1.1 Design Requirements
        2. 9.1.1.2 Detailed Design Procedure
          1. 9.1.1.2.1 Sizing RPULLUP
          2. 9.1.1.2.2 Sizing RIN
        3. 9.1.1.3 Application Curves
    2. 9.2 Power Supply Recommendations
    3. 9.3 Layout
      1. 9.3.1 Layout Guidelines
      2. 9.3.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.3.1 Layout Guidelines

  • The device connections to ground must be tied to the PCB ground plane using a direct connection or two vias to help minimize inductance.

  • The connections of capacitors and other components to the PCB ground plane must use a direct connection or two vias for minimum inductance.